AXIEM is a Method of Moments solver that solves for the currents on conductors that can be embedded in a stackup of planar dielectric layers. The dielectric layers are of infinite extent in the x-y plane as shown in the following figure. The dielectric layers are defined above an infinite half-space. The half-space below the dielectric is typically a conductor or PEC (perfect electric conductor), but it can also be an infinite open boundary if needed. The half space above the dielectric layers is typically an infinite open boundary which correctly models free-space radiation, but it can also be a conducting plane.
Currently, all conductor shapes in AXIEM must be planar in the x-y plane and they can be arbitrarily extruded orthogonally in the z direction. The extrusion of the conductors in the z-direction is referred to as the "thickness" of the conductors. There are no restrictions on the thickness of the conductors. They can be infinitely thin, or they can have finite thickness. The thickness is allowed to protrude through one or more dielectric layers as well. There are also no restrictions on the shapes relative to the grid (they do not need to fall on a grid, as is the case with the EMSight solver). A typical model built in AXIEM contains conductors and vias. Conductors can be of any thickness, and they always start (in the z direction) from the EM layer they are drawn on and extend upward. Vias on the other hand, always protrude downward from the layer they are drawn on, and they always extend through complete dielectric layers (one or more). Since there are no restrictions on the height of conductors, you can draw vias using thick conductors. You should use vias when appropriate, as there are some options in the mesher that treat a via differently from a thick conductor that spans the same z extent.
AXIEM uses a mesh defined on the surface of the conductors as the basis for the solution. The effects of the dielectric layers is taken into account mathematically (through Green's functions), which allows the solution to be found from a much smaller set of unknowns. The surface currents modeled by AXIEM include all x, y and z components. For any conductor that can be created in AXIEM, there are no restrictions on how current flows on the surfaces. The ability to model all surface currents accurately allows accurate analysis of conductor traces of any thickness (even lines that are much thicker than they are wide).
This chapter provides information on setting up and using the AXIEM solver.
AXIEM is licensed in two different configurations, bundled and unbundled. A bundled AXIEM license is used the entire time the NI AWR Design Environment program is operating on your computer. An unbundled AXIEM license is only used when you need to perform an AXIEM simulation. With the bundled license, AXIEM is encoded into the feature name checked out, such as MWO-246. With the unbundled license, besides a main feature, such as MWO-225, you must select XEM-001 from the Optional Features section of the Select License Features dialog box to enable setting up, meshing and using results. See “Select License Features Dialog Box” for more information. You must also have a simulation license (XEM-100) in your license file to run the simulation.
The Job Scheduler is responsible for checking license availability and running simulations when licenses are available. See “EM: Job Scheduler” for details on the Job Scheduler.
When using a floating license, there are several features to be aware of:
The simulation license (XEM-100) is automatically released when the simulation is complete.
The NI AWR Design Environment program can be shut down while AXIEM simulations are running. If using a bundled license, the license is held until the AXIEM simulation is running. If using an unbundled license, only the simulation license (XEM-100) is held until the simulation is complete.
Based on Job Scheduler settings, if more than one XEM-100 license is available, AXIEM jobs can be run in parallel. See “EM: Job Scheduler” for details.
To set the desired analysis frequencies, right-click the EM document in the Project Browser and choose Frequencies tab. See “Setting Frequencies” for more information. You can enter any frequency, including DC. You should always include the DC point when the results of the simulation are to be included in a nonlinear circuit simulation, as it is needed to compute the DC component of the circuit solution. Any of the Auto configure solvers automatically select the correct solver when sweeping from DC to high frequencies.to display the Options dialog box, then click the
If you delete the highest frequency after simulating, you can still retain that frequency as the meshing frequency. The following dialog box displays after you click Frequencies tab. Click to retain the deleted frequency as the meshing frequency and prevent a resimulation at all frequencies.to save your frequency deletion on the Options dialog box
You can use the Solver Information dialog box to check the number of unknowns and ensure they are within a solvable range. Iterative solvers can usually solve up to approximately 50K to 150K unknowns (the limit is problem and solver dependent) for the 32-bit platform, while the 64-bit solver can handle much larger problems. Direct solvers are usually limited to approximately 8K unknowns on a 32-bit platform. When the number of unknowns is large, you should reduce them by adjusting the meshing parameters. Note that the structure must be meshed to get this information, so you may have to wait for the mesher to complete to see the results. If the meshing parameters are set very poorly, and the structure is very complex, the mesher might run out of memory (or take a very long time) before the information displays.
You should always view the mesh before simulating your structure. Using the EM_MESH mesh annotation, you can look for unintentional opens or shorts in your structure. The mesh can also show you how well you have configured your circuit for simulation. The most common problem is over-meshing a structure, resulting in significantly longer simulations than necessary. See “EM Annotations and Cut Planes” for more information on viewing the structure mesh.
You can monitor progress in the Output log section of the Simulation dialog box. The "Estimated Time to Completion" message provides a good estimate of time remaining before completion when AFS (Advanced Frequency Sweep) is not enabled. This information is not available when using AFS, as the number of additional frequencies required for AFS convergence is unknown.
AXIEM can simulate metal traces with or without thickness. In either case, the loss of the metal can be calculated accurately. However, coupling between lines that are close cannot be approximated with thin metal, so thickness may be necessary. In order to simulate with thickness, you must define your metal properties as conductances with thicknesses and NOT impedances. Even with the proper conductor setup, the default in AXIEM is to simulate as thin metal. From the mesh properties, you must tell AXIEM to simulate with thick metal. This option can be set per EM structure or per shape. To change the settings per EM structure, right-click on the EM structure in the Project Browser, choose Options and click the Mesh tab. Clear the Model as zero thickness check box. To change the setting per shape, right-click the shape in the EM structure, choose Shape Properties and click the Mesh tab. Clear the Use default properties and Model as zero thickness check boxes. You can always verify in the 3D view of the EM structure whether it simulates with thin or thick metal. For example, the following figure shows a line set up to simulate as thin metal.
The following figure shows the same line set up to simulate with thickness.
AXIEM uses several different internal solvers. By default, there are auto configurations that attempt to pick the optimal solver for the situation. For example, there are solvers that work well for low frequencies (down to DC), and there are solvers that work well for higher frequencies. The range in which the low frequency and high frequency solvers work well overlaps significantly, so for many problems, either solver should work. When a solver is selected using the Auto configure option, it is automatically selected based on frequency, to allow seamless simulation of structures from DC to very high frequencies (DC to daylight).
The ability to simulate DC accurately is very important when the results of the simulation are used in a nonlinear circuit simulation, as the DC solution is needed to correctly compute the DC component of the solution. Since AXIEM has dedicated solvers for low frequency, you can add a 0 frequency point to your AXIEM simulation frequency list and be confident the answer is accurate. You should always verify the DC response, however, by viewing S-parameters or injecting a DC source and making sure DC currents and voltages look correct for your structure.
NOTE: Both the low and high frequency solvers solve the same system of equations (no quasi-static approximations are made in the low frequency solvers).
AXIEM solvers are categorized as follows:
Low frequency solvers
High frequency solvers
Direct solvers are used for relatively small problems, as they do not scale as well as the problem size grows larger (O(N^2) for the fill, and O(N^3) for the solve). Iterative solvers (often referred to as "fast solvers"), are better suited for large problems. The following table summarizes the scaling for the various solver types. On the EM Options dialog box AXIEM tab, you can select Auto configure as the Solver type to automatically choose the solver based on frequency and problem size.
|Solver Type||Frequency Range||Memory Usage||Matrix Fill||Matrix Solve|
In addition to the solvers listed in the table, there are Iterative solver types with different speed/convergence robustness qualities. See “AXIEM Solver Options” for a discussion of these options.
Ports are two-terminal devices used to model the input and output terminals of the structure. Physically, a port represents a gap voltage source that excites current in the structure. The solution for the current is found during the simulation process. The linear port parameters (S-parameters, for example) are then calculated from the computed currents.
AXIEM supports two kinds of port drawing types: edge ports and internal ports. An unrestricted number and combination of ports is allowed. This section provides additional information on how ports are modeled and used in AXIEM.
See “Adding EM Ports” for details on how to add and edit ports in the EM editor.
The default edge port type in AXIEM is auto port. It is a self-configurable port that determines port settings such as de-embedding reference plane distance, ground reference, and port grouping based upon the geometry and stackup. No user input is needed on auto ports. See “Auto Ports” for details on auto ports. Auto port settings can be overwritten by manually editing options on the port. See “Editing EM Ports” for details on how to change port settings.
Reference plane extensions are sometimes used when very high precision is needed. For many situations, reference plane extensions are not necessary, as the ports in AXIEM introduce relatively small discontinuities. You can use de-embedding to significantly reduce the parasitic effects of the port further (note that de-embedding is required if you use reference plane extensions). See “Port De-embedding” for more information on port de-embedding. See “Setting Reference Planes” for details on how to set the reference plane.
Type changes how edge ports are excited. See “Edge Ports” for details on edge port excitation. When using auto ports, Type is set to Auto, and auto ports determine the best setting. You can also manually specify None or Connect to lower, upper, or both by double-clicking on the port to open the Properties dialog box. The port symbol changes to indicate the selected setting. In the following figure Type is set to Auto for Port 1, None for Port 2, Connect to upper for Port 3, Connect to lower for Port 4, and Connect to both for Port 5.
The default port type in AXIEM is auto port. It is a self-configurable edge port that automatically determines port settings based on geometry and stackup. See “Edge Ports” for details on edge ports.
Auto ports set:
Type (Connect to upper, Connect to lower, Connect to both, or None), accounting for local grounds and/or enclosure boundary
Port grouping (none, coupled, or mutual)
Reference plane extensions for exterior ports if possible
Only ports with Type set to Auto are self-configurable. Auto ports do not apply to AnalystTM simulations. If an AXIEM document is converted to Analyst, any ports set to Auto are converted to Connect to lower.
Auto port does not apply if:
A port is a multi-terminal port
A port is a finite gap port
Type is set to any setting other than Auto
Any Port Group is specified
Any Ref. Plane Distance is specified
Auto port options are included under AXIEM solver options. You can set these options for each document by right-clicking the EM document in the Project Browser and choosing Options to display the Options dialog box. On the AXIEM tab under Auto Port Setup the three auto ports operations (Grounding, Extension, and Grouping) operate independently. Click the button to view advanced settings.
To see the port options automatically set by auto ports you need to select the EM document
in the Project Browser, right-click and choose Preview Geometry. In the
Preview Geometry window that displays, auto ports are converted to standard edge ports, with
port settings automatically determined by auto ports. The Mesh annotation also displays
reference plane extensions and explicit ground references, but not port groupings. For
additional information on auto port calculations, add the
VERBOSE_STATUS 1 rule
to the Rules tab of the Enclosure settings for an EM document. Additional
details display in the Status Window. See “Element Options-(EM) STACKUP Properties Dialog Box: Rules Tab”
for more information on the Rules tab.
The first step in the auto ports methodology is to determine eligible ground planes for each port. This step always occurs, even if the Grounding option is disabled. Eligible ground planes can either be conductive Top/Bottom Enclosure boundaries, or internal conductive shapes. There cannot be any obstructions between the port and eligible ground plane. For shapes to be eligible, the projection of the port on the shape must be entirely enclosed by the shape. There cannot be any edges, slots, or cutouts along the projection of the port.
When there is both a top and bottom conductor that can potentially be ground planes, the Dual Gnd Ratio determines whether only one, or both conductors are considered ground. The primary ground is the one with the higher capacitance per unit area between the trace and the grounding surface. If the capacitance per unit area ratio between the secondary and primary ground is greater than Dual Gnd Ratio, then both conductors are considered eligible grounds. If Dual Gnd Ratio = 1, only the primary conductor is considered ground. If Dual Gnd Ratio = 0, then both conductors are always considered grounds. By default Dual Gnd Ratio = 0.5.
Capacitance per area for multilayer dielectrics is calculated as the total series capacitance of all the layers, as shown in the following figure.
Max Plated Inset Distance is used to determine whether a metal0-via1-metal1-via2-metal2-...-metalN structure should be considered a plated line. If so, the entire plated structure is modeled as thick metal for capacitance calculations, so the distance from the bottom metal layer to lower ground and the distance from the topmost metal layer to upper ground is used for capacitance calculations. The default value is 0, meaning no plated line structures are modeled as thick metal for capacitance calculations.
Max Trace Width is used to determine whether a shape is wide enough to be considered an eligible ground. The default value of 0 means all shapes are eligible.
After ground planes are determined, auto ground occurs. If Grounding is enabled, auto port determines whether explicit ground reference is needed. If the ground plane is a local ground plane, then explicit ground reference is always used. If the ground plane is an Enclosure boundary, then ground reference is dependent on λ and h, where λ is the wavelength of the highest simulated frequency, and h is the distance between the port and the nearest ground. If h<(Max length for implicit grounding)·λ, then implicit grounding is used because explicit ground reference offers no benefit when the distance between port and ground is electrically very short, and results in longer simulation time. When auto port determines that explicit ground reference is needed, then Dual Gnd Ratio (as previously described) determines whether the explicit ground reference connects to lower/upper/both when there are two potential ground surfaces.
If a port is located too closely to a via and uses Enclosure boundary as ground, explicit ground reference is not added since the explicit ground strap can couple to the via. Auto port sets ground reference to implicit if a via is detected within the clearance distance of (Via Clearance Ratio)·h, where h is the distance to the nearest ground. This clearance distance is measured from the midpoint of the port.
By default, interior edge ports do not support explicit ground references. You can enable ground references by selecting the Allow explicit grounding of interior ports, check box, however, the explicit ground strap on interior ports cannot be de-embedded. Also, interior ports cannot support both up/down ground straps on plated line structures. Only the primary ground supports a ground strap.
The following example illustrates several auto ground concepts. Port 1 is attached to a line with a via. Port 3 is located in the interior of the line.
The following figure shows the 3D Preview Geometry view. Based on the substrate height and frequency, all ports should use explicit ground references. However, because Port 1 is located too close to a via, implicit ground reference is used instead. With the Allow explicit grounding of interior ports check box cleared, Port 3 also uses implicit ground reference.
After port grounding is determined, auto grouping occurs. If Grouping is enabled, closely spaced ports are automatically assigned to mutual groups for de-embedding. All ports in a mutual group must share the same ground plane, but do not need to have the same ground reference type. The main use of mutual ports is simulating the interconnect lines attaching to a component that is not included in the EM simulation. Auto port first identifies potential groups based on the pattern of port arrangement, and then checks how closely the ports are spaced. If the ports are spaced within a circle with (Max. Cluster Radius Ratio)· h, they are mutually grouped for de-embedding, where h is the distance to the closest ground. The following figure represents a typical layout where vias and lines connect to a transistor that is not shown. The four ports are auto-grouped together in a mutual group based on their proximity. As shown, the distance between ports is calculated from port midpoints.
For mutual grouping:
(d1, d2, d3, d4, d5, d6)< 2 · RCL where RCL = (Max. Cluster Radius Ratio)·h, and h = distance to closest ground.
After auto grouping has occurred, auto extension can occur. If Extension is enabled, auto port adds reference plane extensions where possible. Extensions are first determined for non-grouped ports, and then for grouped ports.
For non-grouped ports, the desired extension distance for each port is determined by (Optimal Extension Length Multiple)·max(port width, h), where h is distance to nearest ground. Based on this distance, port width, and other extension options (Horz. Clearance Ratio, Clearance Exclusion Angle, Vert. Clearance Up, and Vert. Clearance Down), a three-dimensional (tapered cuboid) keep-out region is created. In order for ports to auto extend, the ground plane must be continuous in the keep-out region, and no other obstructions may lie in this region. Obstructions also include extensions from other ports. If you cannot add the desired extension distance, it is incrementally shortened until the keep-out criteria of continuous ground plane and no obstructions are met. If extensions from two or more ports are interfering with each other, all port extensions are incrementally shortened until the keep-out criteria is met for all of them. The extensions only shorten to a length determined by Min. Extension Multiple. Extensions under this length are considered too short to be useful, and when this limit is reached due to shortening, no extension is added for the port.
By default, the three-dimensional keep-out region for port extension is drawn in the 3D Preview Geometry view. It is drawn on the "AutoPortsKeepOut" drawing layer, which is an NI AWR Design Environment generated drawing layer that is not included in the simulated geometry. To turn off the clearance region, turn off the "AutoPortsKeepOut" layer in the Layout Manager Drawing Layers pane.
The following example illustrates various auto extension options. The first figure shows an unobstructed line above a finite ground plane.
This following figure shows the Preview Geometry view. The ports are extended by distance Lext. In this case, the ports are unobstructed, and the ground plane is large enough to extend the ports by the optimal distance (Lopt):
Lext = Lopt = (Optimal Extension Length Multiple)·h, where h = max(port width, distance to closest ground)
The keep-out region is visible in the 3D Preview Geometry view as the shaded green region, as show in the following figures.
The side view in the following figure illustrates how the vertical extent of the keep-out region is calculated. By default, the vertical extent extends from top to bottom enclosure, but in this example, Vert. Clearance Up = Vert. Clearance Down = 2. The upper vertical clearance distance is:
VCup = Vert. Clearance Up·h, where h = distance to closest ground
In this example, VCup = 2·h
Because the distance from the port to the lower ground plane is less than the calculated vertical extent based on Vert. Clearance Down, the lower vertical extent of the clearance region is simply the distance to ground. h<Vert. Clearance Down·h, thus:
In this example, VCdown = h
The following top view illustrates how the horizontal extent, and angle of the taper of the clearance region are defined.
θ = Clearance Exclusion Angle
HC = (Horz. Clearance Ratio)·h, where h = distance to closest ground
The following figures illustrate how obstructions affect auto port. The first figure shows that there are two additional shapes, which are not on the same EM layer as the line. Also, a hole is cut in the ground plane.
This next figure shows the Preview Geometry view of the same structure. Port 1 is not extended at all because it is blocked by the shape on the left. Port 2 extension length is less than optimal because the hole in the ground plane prevents further extension.
It is easier to understand the port extensions when looking at the 3D Preview Geometry view as shown in the following figure. The shape to the left of Port 1 is not on the same EM layer, but is within the vertical clearance distance for Port 1, so that shape is considered an obstruction for Port 1. On the other hand, the shape on top of Port 2 is outside of the vertical clearance region, so it is not considered to be either a possible ground for Port 2, or obstruction for Port 2. Note that the hole in the bottom ground plane is considered an obstruction, and prevents further extension of Port 2. With the exception of cut-lines, ground planes must always be continuous across the clearance region.
The top view of the following 3D Preview Geometry view shows the horizontal extent of the keep-out region. The minimum extension length (Lmin) is set by Min. Extension Multiple:
Lmin = (Min. Extension Multiple)·Lopt, where Lopt is calculated above.
In the following figure, the extension length for Port 1 (Lext) is calculated as:
Lext = Lobs - HC, where HC is the horizontal clearance distance calculated above.
In this example, Lext<Lmin. Because the calculated extension length (Lext) is less than the minimum extension length, no extension is added for Port 1.
Lastly, auto extension is applied to grouped ports. Ports in mutual groups only extend if Allow mutual group extensions is enabled. Furthermore, Group Clearance Ratio and Via Clearance Ratio options limit how far the grouped ports can extend. Group Clearance Ratio is the equivalent of Horz. Clearance Ratio for non-grouped ports. Group Clearance Ratio determines the unobstructed horizontal clearance distance for grouped ports. The next set of figures illustrates an example of mutually grouped ports with extensions. The first figure shows four ports that auto ports grouped together due to their proximity.
The next two figures show the Preview Geometry 2D and 3D views. Allow mutual group extensions is enabled, so Ports 1 and 2 are extended. Ports 3 and 4 do not extend, since extending them brings them closer the via.
The top view with the "AutoPortsKeepOut" drawing layer turned on shows how the horizontal extent of the keep-out region for grouped ports is calculated.
GC = (Group Clearance Ratio)·h, where h = distance to closest ground
If ports are initially determined to be coupled, they remain coupled after Auto port modifications. See “Coupled Line De-embedding” for details on the requirements for coupled line de-embedding. If ports are detected as coupled, then:
Auto ports attempts to keep extensions the same length.
Clearance regions of coupled ports can overlap.
Coupled ports are excluded from mutual groups.
The following example illustrates auto ports on coupled lines.
The top 3D Preview Geometry view shows how the clearance region for each port can overlap, since the extensions are de-embedded using coupled line de-embedding.
NI AWR recommends utilizing geometry simplification rules with plated lines to eliminate insets in the line structure. If there are rules, auto ports determine port settings based on the simplified geometry. See “Geometry Simplification” for details on writing rules.
For plated lines structures that are not simplified with rules, the Max Plated Inset Distance determines whether or not the inset layers of the line are recognized as a plated line. Layers inset less than this distance are recognized as being part of the plated line structure, while layers inset greater than this distance are considered obstructions for auto ports. By default, Max Plated Inset Distance = 0, so no plated line structures are recognized.
For valid plated line structures, the following figures illustrate how auto ports extensions are applied. The plated line consists of metal-via-metal layers. The following 3D view has the vertical scale expanded to better show the details.
When auto extension is applied, the extension line is composed of all of the layers. The cross-section of the original line is not maintained across the extension. Instead, widths of all the plated line layers are made equal so that the extension line has a rectangular cross section, as shown in the following Preview Geometry views.
The AXIEM solver can use a number of different ports. See “Adding EM Ports” for details on how to add ports in the EM Editor.
Edge ports are the simplest and most commonly used port in AXIEM. The default port type is auto, which is a self-configurable edge port. See “Auto Ports” for more details about auto ports.
An implicit edge port, with no ground reference, is defined in terms of voltage and current. The voltage is defined from the edge where the port is located, to the infinite ground plane (or infinity, if no ground plane is specified). The implicit edge port uses a path-independent voltage for its definition, which works well for low frequencies or transmission lines that support quasi-static modes. The implicit ports can introduce some error for structures where the transmission lines have significant dispersive effects. Where dispersion is an issue, a Type option is available to connect the port to a ground plane either above and/or below the edge with a vertical strip of conductor. The Connect to lower, Connect to upper, or Connect to both options for Type automatically insert a vertical strip of conductor that extends from the port edge to the nearest conductor or ground plane that is encountered. For Connect to lower or Connect to upper, a delta gap port is added between the bottom of the strip that extends to the nearest conductor (or ground) and the shape to which it is connected. For Connect to both, the delta gap port is added in the middle, between the upper and lower strips. The effect of the strip introduces more of a discontinuity than the implicit port with None selected as the Type, so you should enable de-embedding when using Type. See “Setting Explicit Ground Reference ” for details on editing the ground reference.
An internal edge port is surrounded (overlapped) by metal on the same layer. Internal edge ports cannot be de-embedded, even if De-embed is selected (the simulation issues a warning indicating this). If the Type of an internal edge port is set to any of the Connect to options, the ground straps are not de-embedded.
AXIEM models point ports as a small internal edge port located at the center of the shape, with no de-embedding. By default, the Type is set to None, meaning implicit ground reference, with the same details and restrictions as implicit edge ports. However, point ports differ from internal edge ports when Type is changed to one of the Connect to options. In this case, the point port becomes a differential port, with the positive terminal on the original layer and the negative terminal(s) on the first layer with metal directly beneath and/or above the port.
Differential ports are a group of edge ports where you can define the return location as any arbitrary point in the circuit. To do so, make one or more ports the negative terminal of the port groups by specifying the Port Number as the same number with a negative sign preceding the number. Differential ports must have ground reference Type set to None.
Some common uses for differential ports are to create CPW lines
and finite gaps.
Like an internal port, a differential port appears as a single port on the SUBCKT block when the EM structure is placed in a schematic as a subcircuit. To connect a circuit element between the positive and negative sides of the differential port, connect it between the one port in the schematic, and ground. The same restrictions as internal ports apply to differential ports.
The series port grouping is a convenience port which allows you to access a differential (finite gap) port as a two-terminal device. AXIEM actually converts a series port into a differential port for electromagnetic simulation via the Method of Moments. After this simulation is complete, a linear circuit simulator is used to attach an ideal 1:1 transformer to the differential port, resulting in a positive and negative terminal for the series port group. It is easiest to think about these two external ports as being excited/terminated in differential and common mode. The differential excitation sees the same impedance as the finite gap port in the EM simulation. The even mode excitation sees an open circuit.
The underlying simulation of a series port is a differential port simulation, thus, series ports are subject to the same guidelines and restrictions as differential ports.
In the Properties dialog box you must configure two ports to be part of a group in order to be considered a series port. In the Port Group section, select Series as the Type. Name can be either a new name or an existing name selected from the drop-down list.
Series port groups have the following limitations:
They must contain only ports with positive indexes.
They must contain only ports with exactly two port indexes (not one, or more than two).
The lowest port index in a series port group is considered the positive terminal of the differential (finite gap) port.
The most common use for series ports is the simulation of a gap, across which a series component is placed, as shown in the following figure. Ports 3 and 4 are part of the same series port group, and represent one port.
When the EM structure is used as a subcircuit in a schematic, nodes 3 and 4 represent the series port.
The equivalent differential port simulation of the gap is shown in the following figure. Again, Ports 3 and -3 represent one port.
The equivalent schematic with the differential port subcircuit is shown in the following figure. Unlike the series port, only one node is exposed for the differential port. Ports 2 and 3 on the transformer in the following figure are equivalent to ports 3 and 4 on the SUBCKT block in the previous schematic. This is not the recommended way to use differential ports, but only an illustration of the difference between differential and series ports.
Multi-terminal ports are similar to differential ports except that you can define two or more locations to share the same source. You can think of this as exciting multiple location in a circuit in common mode. For multi-terminal ports, their return can be infinity (Type set to None), a ground plane (Type set to other than None), or a negative terminal port (Type set to None and another port with the same number but a negative sign in front). The following figure shows the configuration with no ground reference.
The most common use for multi-terminal ports is to help make the extraction flow work efficiently. There are times that several lines overlap one area and it is more efficient to make the end of the lines use the same port instead of individual ports. This is valid as long as the area they are overlapping is electrically small. For example, if there are three iNets overlapping an area pin, but the area pin metal is not extracted, the EM document displays as shown in the following figure,
and if the metal of the pin is extracted, it displays as shown in the following figure.
Typically, area pin areas are small electrically, so either configuration provides the same answer.
An edge port can be on any edge of a conductor even if the conductor is touching or overlapping other conductors. This is different from an internal port in that the return path for this port is either infinity (Type set to None) or a ground plane (Type set to other than None). The following figure shows the configuration with no ground reference.
This port cannot currently be de-embedded. This is primarily support for extraction work when ports must be added to shapes in several situations.
Internal ports are connected between two polygons that are adjacent to each other as shown in the following figure.
Because of this small gap, there is some small parasitic of this port that is not currently removed in a de-embedding process. The difference between this port and a differential port with a ground return defined is that this port has a very small gap between the conductors that is excited, where the differential port can define any gap you want that is excited.
Internal ports are the most complicated of the ports, and should be used with caution. To use the internal ports effectively requires a good understanding of both the implementation of the internal ports and the concept of a local ground reference. The resulting S-parameters from a simulation that uses the internal ports is not a general S-parameter and there is a relatively non-intuitive methodology that you must follow to get meaningful results.
See the EMSight description of internal ports in “Description of Internal Ports” since the issues are similar.
Even with no de-embedding, AXIEM edge ports have a very low discontinuity because the excitation is handled as if the port were pulled away from the structure and the port reference plane were extended back to the port location. This is different than EMSight, which has higher port discontinuities because the excitation occurs directly at the port location, and it takes some distance for the current flow to spread out into the real operating mode on the line, as shown in the following figures. The x dimension AXIEM current flow from the port reflects the actual propagation mode of the line, while the EMSight x dimension current flow shows uniform current across the entire port edge.
AXIEM x dimension current:
EMSight x dimension current:
Similarly, the AXIEM y dimension current flow is nearly 0 (as expected) but the EMSight y dimension current flow is non-zero in the first few mesh as the current has to “spread out” to account for the real propagation mode on the line.
AXIEM y dimension current:
EMSight y dimension current:
Port de-embedding is accomplished by creating one or more standards (separate EM structures), analyzing them to understand the discontinuity, and then subtracting (or negating) the effect of the discontinuity at every port. AXIEM currently supports three different de-embedding types.
Single line de-embedding is used for edge ports with any grounding type that currently can be de-embedded. See the following list for configurations that cannot be de-embedded. No user input is needed for coupled line de-embedding.
Coupled line de-embedding occurs where any ports that share a common reference plane location can be de-embedded with a coupled line de-embedding standard. AXIEM automatically uses coupled line de-embedding if two conditions are met:
The first condition is that the reference planes must be along a co-linear line. Lines can be on different layers and have different reference plane shifts as long as the end of the reference plane is along the same line. The following figures show valid coupled line de-embedding situations.
Case 1 - no reference planes:
Case 2 - with reference planes:
Case 3 - different reference plane lengths:
Case 4 - lines rotated:
The second condition is that the lines are close enough together to be included in a coupled line standard. AXIEM determines this by first finding the furthest distance to ground for any of the ports and then multiplying this distance by the Coupled Ratio set in the EM Options dialog box on the AXIEM tab. This multiplication produces a coupling distance. Any ports that have an edge-to-edge spacing that is less than the coupling distance are automatically included in a coupled line de-embedding standard. The following figure further illustrates this process.
In this case, H3 is the furthest distance to ground, so this distance is multiplied by the coupled ratio. If S1 or S2 are less than the coupled ratio, those lines are all included in a coupled line de-embedding standard. You can always set the Coupled Ratio to 0 if you do not want any coupled line de-embedding. At low frequencies (near DC), no coupled line de-embedding is ever used.
Mutual group de-embedding occurs where ports are close together and the ports themselves can couple together, especially if using an explicit ground. In the Properties dialog box you must configure ports to be part of a group so they can be de-embedded as a group. In the Port Group section, select the Type as Mutual. The Name can be either a new name or an existing name selected from the drop-down menu.
At low frequencies (near DC), no mutual de-embedding is used.
The most common use of mutual ports is when simulating the interconnect into some component that isn't EM simulated. For example, the following figure shows a FET surrounded by shapes on all four sides that should be EM simulated. Obviously, the FET cannot be included in the EM simulation.
The EM layout for this scenario is shown in the following figure (which is easily created using extraction).
For maximum accuracy, the ports are connected to the bottom ground. In this case the distance to the ground is 100um, similar to the distance between these ports, so there is coupling between these ports. Mutual group de-embedding can remove the coupling from the simulation results.
The de-embedding standards created for mutual groups have to extend metal in the opposite direction of the port number, so there are many situations that are not valid for mutual group de-embedding. The simplest example is a simple bend discontinuity.
The two ports are about 80um spaced on a 100um substrate, so with explicit grounds (for maximum accuracy) these ports will couple significantly. This situation produces a simulation error because the mutual de-embedding standard has overlapping metal (metal extended from Port 1 to the right and from Port 2 down). For this simple example, the solution is to add reference planes so the ports are spaced far enough apart and they won't couple.
When setting up your ports for de-embedding, you can use an annotation to view the de-embedding standards. This allows you to verify you will get the de-embedding type you expect before your simulation runs. To use an annotation, right-click your EM structure in the Project Browser and choose Measurement Type and Measurement shown in the following figure.. Specify the
The most important settings are the EM Simulation Document, the Port Number and the Standard Number. For this check, you should always use a standard number of 1. The following figure shows an example of a single line de-embedding case.
The relative location of the shape being meshed is not important, but the number of lines drawn is important; in this case, one. The following figure shows an example of a coupled line de-embedding case.
Note that there are now two lines drawn showing coupled line de-embedding. The following figure shows an example of a mutual group de-embedding case.
Note that there are now four lines drawn showing the mutual grouping.
By default, AXIEM attempts to de-embed all ports. You can turn off port de-embedding for each port by double-clicking the port and then selecting the De-embed check box in the Properties dialog box. See “Port Attributes Dialog Box” for details. You can turn off port de-embedding for the entire AXIEM structure by right-clicking the AXIEM document in the Project Browser, choosing to open the Options dialog box, and then clicking the AXIEM tab. Clear the Enable De-Embedding (Global) check box. The setting on the AXIEM document overrides the settings made per port.
During simulation, you can view the Simulation status dialog box to see the de-embedding type for each port, as shown in the following example.
Ports 7 and 4 use single line de-embedding, ports 2 and 3 use coupled line de-embedding, and the rest are set up for a mutual calibration group. During the simulation, notice that each port's de-embedding type displays.
The same information is stored with each AXIEM structure in the Simulation Log.
For any de-embedded ports, the reason is listed as a warning in the Status Window. The following figure shows an example of these warnings.
The following list explains the current port configurations that are not de-embedded:
Edge ports with an explicit ground that is blocked from the chosen ground by another shape.
Edge ports on an internal edge (touching other shapes or inside other shapes).
A stylized view of the subtraction (negation) of the de-embedding matrices from the raw EM matrix is shown in the following figure (this process applies to all ports in an N port EM matrix).
The first de-embedding standard generated is shown in the following figure. The IND and CAP elements in the standards represent the port discontinuity, and the TLIN elements are automatically inserted based on the length of user-defined reference plane shift, the dielectric height, the metal width, and other values.
This structure is driven in an even mode and then an odd mode, which places a perfect electrical short or open at the exact center of the structure. Using this knowledge, the matrix can be perfectly divided in half (the symmetry is assumed here in the de-embedding standard), which results in the y-matrix represented by the topology as shown in the following figure.
If there are user-defined reference plane shifts, the length of the TLIN element (L) is equal to the reference plane shift. In this case the y-matrix result from the first standard is sufficient to remove the port discontinuity and shift the reference plane when “subtracted” from the direct EM results. If there is no user-defined reference plane shift, the effect to the TLIN element needs to be removed so that only the port discontinuity remains. In this case, a second de-embedding standard is required, as shown in the following figure.
By subtracting the final result from the first de-embedding standard (which includes the IND, CAP, and TLIN) from both ends of the second de-embedding standard, the y-matrix is reduced to simply one TLIN of length L. Then, if this TLIN is subtracted from the final result from the first de-embedding standard, the result is simply the effect of the port discontinuity as shown in the following figure.
Either the final result from the first standard (if there are user-defined reference plane shifts) or the second standard are used to de-embed the port effects from the raw EM matrix.
Higher order modes that exist in the structure or the de-embedding standards can cause problems.
There should be no shapes drawn at the same location as a port and its reference plane. The reference standard is always the width of the line at the port and a length determined by the de-embedding process. If the real structure has other geometry under the reference plane extension, this geometry is not included in the de-embedding standard.
The following sections include AWR port usage recommendations for specific structures.
Differential lines are excited by Differential ports, as shown in the following figure. The common mode of the two lines is not excited by the differential ports, and the effective load impedance for this mode at the ports is an open circuit. Differential excitation/termination of line in this manner is only recommended if a local ground is NOT present. If a local ground is present, excitation by normal single-ended ports is suggested, as this addresses excitation/termination of both differential/common (odd/even) modes.
You can also set up Coplanar waveguide (CPW) excitation using Differential ports. It is assumed that only one mode of propagation is allowed at each port (the port width is much smaller than the guided wavelength). Thus, if the ground plane widths are electrically very large, it is better to attach the negative ports across a subsection of the ground plane, as shown in the following figure.
Edge ports with implicit ground reference (default port with Type set to None) work best when the distance between Port and ground reference (Top or Bottom boundary) is short compared to wavelength. As the electrical distance gets larger, ground return currents are not well-specified, and can result in passivity and accuracy problems. In these cases, use Edge ports with Type set to Connect to upper or Connect to lower, depending on the structure.
For microstrip structures (with infinite ground plane) the most accurate de-embedding is obtained with Edge ports with explicit ground reference. If the port is placed too close to a via, however, the port ground strip couples with the via, which cannot be de-embedded. For accurate simulation results, you should separate the port from the via by a minimum distance of four times the thickness of the substrate or width of the trace, whichever is greater. You can then use Reference plane extensions to de-embed back to the via.
When simulating a via, you should always simulate it with a connecting line. If the reference plane is placed too close to the via, even if the port is sufficiently distant, the S-parameters obtained can be slightly non-passive. When de-embedding the portion of the microstrip line that runs from the port up to the specified reference plane, it is assumed that the line is in an ideal environment (the line is the only EM structure in the considered layered media). If the reference plane is too close to the via, however, the properties of the line along the path from the port to the via are not uniform. Best results are obtained when the reference plane is placed no closer than two times the thickness of the substrate or width of the trace, whichever is greater.
Closely spaced ports placed across the gap of an interconnect pad to an external device can couple to each other, and result in inaccurate de-embedding if not set up correctly.
To set up the ports correctly, the first option is to use Differential ports or Series ports. Both port types result in equivalent simulation. Both ports are not de-embedded, and explicit connection to the lower/upper ground is not allowed. By definition, the current going into one terminal of the Differential/Series port must equal the current coming out of the other terminal. You should not, therefore, use this option if the external device is active.
The second option is to use Edge ports with mutual group de-embedding with or without explicit ground reference. The ports are then de-embedded together, and account for the coupling between each other. You can use this approach for both passive and active externally connected devices.
If there is an infinite ground plane, using a port with explicit ground reference provides a clear physical definition of the return current path and allows an accurate de-embedding of the port, so simulation results are very accurate. In many situations, however, the return current path does not go through the infinite ground plane or there is no infinite ground plane defined. Also, ports may be blocked from the infinite ground by design components and it is not possible to connect ports explicitly with the ground.
The following example of a two-plate capacitor above a finite conducting plane illustrates several options for setting up simulation ports with a finite local ground plane.
The first option is to use an Edge port with explicit ground reference to the local ground plane. The local ground plane should be infinitely thin. A metal strip that connects from the port to the local ground is included, thus a small amount of extra inductance and capacitance is added to the structure. You should enable port de-embedding to remove this extra parasitic reactance due to the metal strip.
The second option is to use Differential ports with negative reference ports defined on the nearest edge of the local ground plane. If the ground plane width(s) are electrically very large, it is better to attach the negative ports across a subsection of the ground plane. It is important to realize that current travels from the negative to the positive terminal with zero delay. To minimize errors caused by this effect, you should place the positive and negative ports as physically close to one another as possible.
The third option is to place a rectangle on the ground plane directly below the port and define the negative reference port on the edge of the rectangle. Note that the return current flows through the ground plane into the defined negative reference plane. Usually, width of the ground rectangle is equal to the width of the corresponding trace above it, however widths can be increased. This configuration results in a minimum distance between positive and negative ports, thus minimizing error due to the zero delay. Also, this type of excitation introduces a less parasitic reactance compared with Edge ports with explicit ground reference. However, this port currently cannot be de-embedded.
Differential ports are not de-embedded.
If there is no global infinite ground plane, do not use ports with implicit ground connection (default Edge ports). The return currents are not well defined and can cause inaccurate results.
The AXIEM mesher automatically generates a hybrid mesh consisting of mixed triangular and rectangular cells. The mesh is a full surface mesh that can accurately model both thin and thick conductors.
The mesher uses heuristic knowledge of how currents flow on the conductors to help generate a very efficient mesh that allows very high accuracy while minimizing the number of unknowns. You can also control various aspects of the meshing process, both globally (for the entire mesh) and locally (per shape).
Since AXIEM makes no assumptions on how currents flow on the surfaces of the conductors, it is well suited for simulations of very thick conductors. The solutions for thick conductors account for all x-, y-, and z-directed currents on all surfaces.
See “EM Annotations and Cut Planes” for details on how to view your AXIEM structure mesh.
The following terms are used to define how geometry meshing works.
Meshing density defines how many mesh elements are in a given area. This is easily demonstrated with a single line changing settings to alter how the mesh is created. The following figure shows the line with a low mesh density that has 74 unknowns.
The following figure shows the line with a medium mesh density that has 167 unknowns.
The following figure shows the line with a high mesh density with 518 unknowns.
Most new AXIEM users tend to over-mesh a structure (use too high a density of mesh). In the following example, the graph of S11 magnitude shows results for the different meshing densities are almost identical.
Decimation is the process of simplifying the vertices of shapes before they are meshed to simplify the meshing. It is very important to understand that the shapes in the EM structure layout are not changed by decimation. The decimation process uses the shapes in the EM structure layout, and applies heuristics to slightly change the vertices before the mesher operates on the decimated shapes. There are a number of ways to control this simplification process discussed in later sections. The following figure shows a simple line with a small piece of metal attached to the top of the line.
Without decimation, the extra metal on top is meshed.
With decimation configured to ignore shapes about this size, the extra metal on top is not meshed.
This example is somewhat contrived because this geometry would have some small affect on the response of the circuit. Decimation typically works on much smaller geometries than that demonstrated here.
You can set AXIEM mesh options globally by choosing Mesh tab. A new AXIEM structure can use these settings or you can override these settings on the document itself by right-clicking an EM structure in the Project Browser and choosing and then clicking the Mesh tab. You can clear the Use Project Defaults check box to control the mesh per EM structure. You can set these options per shape by right-clicking any shape in the EM structure and choosing Shape Properties, and then clicking the Mesh tab. You can clear the Use default properties check box to control the mesh per shape.and clicking the
The mesh created for an AXIEM structure depends on many different settings.
In AXIEM, the shapes in the EM structure determine what gets meshed. The shapes do not need to be drawn on grid to be accurately meshed. In some simulators, such as EMSight, the mesh can only be drawn on the grid points for the structure. For example, see the following line.
Notice the shape vertices are not touching the grid, yet the mesh is perfectly covering the line. The same line in EMSight has a mesh that looks similar to the following figure.
Notice that the mesh drawn is not perfectly on top of the shape.
The largest geometry allowed in a single mesh is determined by either the maximum frequency for the structure or the Meshing Frequency you enter. See “Options Dialog Box: Frequencies Tab” for details. If you set the Meshing Frequency, you must set it to a frequency higher than the highest frequency currently set up for the EM structure. The largest frequency determines a wavelength and then a fraction of this number is used as the maximum mesh size. The Meshing Density setting controls the fraction by determining a number of mesh elements per wavelength.
Because the largest mesh size is determined by frequency, if you have completed a simulation and then change your highest frequencies, it is possible that ALL the frequencies will need to simulate again (because the mesh has changed). However, if you add any frequency lower than the maximum, only that frequency should need to be simulated. For example, the following figure shows a line with a maximum frequency of 1 GHz.
The following figure shows the same line with a maximum frequency of 100 GHz.
You can change the mesh options for various levels of mesh density. The Low, Normal or High options adjust the number of elements relative to a wavelength (Low is set to give the minimum required for a reasonable solution, High is intended for improved accuracy, and Normal is a good default for both). This option is set for each EM structure. The following figure shows the line with a Low setting.
The following figure shows the line with a Normal setting.
The following figure shows the line with a High setting.
The following figure shows the line with a No Variable Mesh setting. In this case the maximum mesh size is one grid size.
The Enclosure Grid_X and Grid_Y values control the snap grid for the EM layout. They can also affect mesh if the Mesh Units option on the Mesh tab is set to Relative to cell grid. In general, the minimum of Grid_X and Grid_Y is used to determine the smallest mesh size drawn (with several exceptions) and the size of geometry to be simplified by decimation.
You can set the Enclosure Grid_X and Grid_Y by double-clicking the Enclosure node under your EM structure. In the ENCLOSURE Properties dialog box, click the Enclosure tab. See “Element Options-(EM) ENCLOSURE Properties: Enclosure Tab” for details. For example, the following figure shows a line with Grid_X and Grid_Y set to 0.5 mils.
The following figure shows the same line with Grid_X and Grid_Y set to 5 mils.
The Max aspect ratio controls the typical aspect ratio of the elements used in the mesh (in particular, it has a strong influence on the edge meshing). Wavelength at the highest frequency determines the maximum mesh size, however, often if that were the only criteria, you might have many long, thin mesh sections, which are not desirable. This setting limits the maximum aspect ratio (length/width) that a mesh cell can have. If you use a higher aspect ratio you see longer and skinnier mesh elements. Typically, the default value is used for this setting, but advanced users may want to experiment with other settings. NI AWR does not recommend setting the max aspect ratio to a value higher than 20 as it can lead to long, thin mesh slivers. This is set for each EM structure. For example, the following figure shows a line with the default setting of 10.
The following figure shows the same line with the setting changed to 20. Both of these were for a maximum frequency of 1 GHz.
The following figure shows the same line with the setting at 20, but the maximum frequency of 100 GHz, which would be the same with this setting 10 or 20. At this frequency the largest cell is determined by frequency, not the max aspect ratio.
Your selection determines how the Enclosure grid settings affect meshing. If you select Relative to Drawing Grid, all mesh settings are set relative to grid size, so the mesh cell size changes if the grid size changes. If you select Absolute Dimensions, all mesh settings are set as absolute values, and do not depend on the grid.
The Min Edge Length value determines the minimum mesh cell size. This value multiplied by the Max aspect ratio on the Mesh tab determines the maximum mesh cell size. Essentially, a smaller value results in a denser mesh. You can specify this value relative to Enclosure grid (as a multiple of the grid size), or as an absolute length.
Based on the previous settings, you can define the maximum and minimum mesh sizes for a structure. For the maximum mesh size, two numbers are calculated. The first is the maximum mesh for the frequency specified, where a wavelength for the highest frequency is calculated and the Meshing Density adjusts the number of mesh elements per wavelength. The second is the Min Edge Length value, multiplied by the Max aspect ratio. The smaller of these two numbers is used as the maximum mesh size. The minimum mesh size is the Min Edge Length value.
Edge meshing options ensure that there is a small mesh located on the edge of each shape being meshed. Since currents want to flow on the edges of conductors at microwave frequencies, an edge mesh is important to get accurate simulation results. NI AWR does not recommend turning off this option. You can turn on or off edge meshing for each EM structure. For example, the following line uses edge meshing.
The following figure is the same line without edge meshing.
The thickness of the edge mesh is the minimum mesh size determined for the structure.
By default, no edge mesh is included with thick metal shapes. When thickness is being modeled with currents on the vertical sides of the conductors, the edge current singularity is modeled fairly well by these vertical side currents, and edge meshing is less important for an accurate solution. Clear the No Edge Mesh for Thick Metal (Top/Bottom) option on the Mesh tab of the Options dialog box to include an edge mesh. Note that this option is only significant if you specify edge meshing. The following figure shows a magnified view of a line without this setting.
The following figure is the same line, but with the edge mesh turning on for thick metal.
This option is selected by default, and reduces the number of mesh elements in the z-direction if possible. Without this option, the z-direction mesh works the same way as the xy-direction mesh. The following figure shows a line with thick metal (very thick for demonstration purposes) and a via with this setting selected (the default).
The following figure is the same structure, but the setting is turned off.
Select this option to see if you get more accuracy for your vias. The following figure shows a line with thick metal (very thick for demonstration purposes) and a via with this setting turned off (the default).
The following figure is the same structure, but with edge meshing vias turned on.
There are two complimentary methods to simplify structures to help achieve an efficient mesh. The following sections describe these methods and the settings that apply to each. Note that you can set mesh and decimation settings at various levels (globally, per EM document, and per shape). See “Setting Global or Document Mesh Options” for details.
You can write rules to simplify geometry before it is sent to the EM simulator. This is not just an AXIEM feature, but is a powerful (and recommended) method for simplifying geometries to be simulated. See “Geometry Simplification” for details.
Decimation is a complimentary method to geometry simplification using rules. The difference is that rules are applied to the EM layout before the geometry is sent to AXIEM, whereas decimation is part of the AXIEM mesher. If rules are used for geometry simplification, AXIEM receives the rules-simplified geometry and then applies decimation during the meshing operation.
You can set the decimation level from None to Very High, with Medium as the default. When set to None, the mesher meshes the shapes exactly as they are drawn in the EM structure layout. This mode generates the most accurate mesh. When set to Very High, an extreme level of geometry modification is applied to reduce the number of mesh elements. If rules are used to simplify the geometry, then the default setting is to use the lowest level of decimation on the already simplified geometry.
This example demonstrates how the mesh is configured in AXIEM. The following definitions are included to better understand the mesh:
Edgemesh = [Minimum of (Grid_X,Grid_Y)] * [Min Edge Length grid multiple] if Mesh Units is set to Relative to cell grid.
or Edgemesh = Min Edge Length value if Mesh Units is set to Absolute dimensions.
Meshmin_set = Edgemesh * k
where k=2 for Low mesh density, k=1 for Normal mesh density, and k=0.5 for High mesh density. This is the minimum mesh size calculated from the Min Edge Length setting. This value is also the width of the edge meshing cells, if the option is enabled.
Meshmax_set = Meshmin_set * Max Aspect Ratio. This is the maximum mesh size calculated from the Min Edge Length setting.
Meshmax_freq = lambda/N
where lambda is described as follows, and N=8 for Low mesh density, N=16 for Normal mesh density, and N = 32 for High mesh density. This is the maximum mesh size determined by mesh frequency. By default, mesh frequency is the highest simulated frequency, but can be set higher.
Meshmin_freq= Meshmax_freq/Max Aspect Ratio. This is the minimum mesh size determined by mesh frequency.
Lambda (mesh frequency wavelength) is defined as:
c is speed of light,
f is the meshing
en is the dielectric constant of
layer n in the stackup.
If Meshmax_set > Meshmax_freq, then Meshmax_set = Meshmax_freq, so the maximum mesh size is always the smaller of the two values determined by Min Edge Length or frequency.
The length of the meshed cells cannot be smaller than Meshmin or larger than Meshmax.
The following figure is a 50 mils wide line drawn on a 5 x 5 grid, on a substrate with
The following mesh options are set for the line:
Mesh Density is set to Normal.
Edge Mesh Thin Metal is selected.
Mesh Units is set to Relative to cell grid.
Min Edge Length is set to 1 * grid.
Max Aspect Ratio is set to 2.
The mesh frequency is set to 2 GHz.
Using these definitions, Edgemesh = (1 * grid) and Meshmin_set = (Edgemesh * k). Since the grid is 5 mils x 5 mils, the minimum of these two values is 5 mils, and that makes the Meshmin_set = 1*5 mils *1 = 5 mils (k=1 because Normal mesh density is selected), so 5 mils is the minimum mesh size.
Meshmax_set = (Meshmin_set * Max Aspect Ratio) = 5 mils * 2 = 10 mils, so 10 mils is the max mesh size.
Since Edge Mesh Thin Metal is enabled, Meshmin_set determines the width of the mesh elements along the edge of the line, and the remainder of the line width is meshed with respect to Meshmax_set. The width of the line is 50 mils; there are 5 mils on each side used for edge meshing, so there are 40 mils left along the width of the line to be meshed. The remaining line width (40 mils) is divided by the maximum mesh size (40 mils/10 mils=4) to yield 4 mesh cells across the middle of the line width. Therefore, there are a total of 6 cells across the width (2 edge cells + 4 interior cells), as shown in the following figure. Note also that Meshmax_set (10 mils) is less than Meshmax_freq (lambda/16=116 mils) in this case, so there is no need to recalculate the mesh relating to frequency.
If the Mesh Density is set to Low, Meshmin_set = 10 mils (Edgemesh*2) and Meshmax_set = (10 mils * 2) = 20 mils. With edge mesh cells 10 mils wide, there is 30 mils in the remainder of the line width to mesh (50 mils - 20 mils = 30 mils). The remaining width is divided by the maximum mesh size to determine the number of interior mesh cells. Since 30 mils/20 mils = 1.5, and is not an integer number, it is rounded up to 2 so that the mesh size is not larger than Meshmax_set. This calculation results in two interior mesh cells (30 mils/2 = 15 mils), for a total of 4 cells across the wide of the line, as shown in the following figure.
If you change the Mesh Density to High, Meshmin_set = (5 mils* 0.5) = 2.5 mils and Meshmax_set = (2.5 mils * 2) = 5 mils. There are 2.5 mils edge mesh cells on each side of the line, and the remaining 45 mils are divided into 5 mils cells, for a total of 2 + 9 = 11 cells across the entire width of the line, as shown in the following figure.
If you change the Mesh Density to No variable mesh, Meshmax_set=Meshmin_set=Edgemesh. Since Edgemesh is 5 mils, you get 10 cells across, as shown in the following figure.
To see how the frequency can affect the mesh, reset the Mesh Density
to Normal and set the frequency to a Single point of
50 GHz. All other settings remain the same. Using the equation previously defined, lambda is
88.61 mils, and since the Mesh Density is Normal,
n = 16, Meshmax_freq = lambda/16 = 5.538 mils, and Meshmin_freq = 5.538
mils/ 2 = 2.769 mils, so the maximum mesh size due to frequency is 5.538 mils and the minimum
mesh size due to frequency is 2.769 mils. Since this Meshmax_freq < Meshmax_set, Meshmax_set
is reset to equal Meshmax_freq and Meshmin_set is reset to equal Meshmin_freq. Now the new
Meshmax_set = 5.538 mil and Meshmin_set = 2.769 mil. With these new numbers, both edges of the
line are meshed with 2.769 mils wide edge cells, and the remaining width (50 mils - 2 * 2.769
mils = 44.462 mils) is divided by the maximum mesh size to determine the number of interior
cells 44.462 mils/5.538 mils = 8.02. Rounding this up to 9 results in 9+2=11 cells across the
width of the line as shown in the following figure.
If Mesh Units is set to Absolute Dimensions, all the previous rules apply except that Meshmin_set is equal to the Min Edge Length absolute value.
You can set AXIEM solver options for each document. To access these options, right-click the EM document in the Project Browser and choose Options. The Options dialog box AXIEM tab includes settings.
The following AXIEM solvers are available:
Auto Configure: This solver automatically chooses either Iterative Default or Direct Default, depending on the size of the problem (small problems less than a few thousand unknowns use the Direct solver). This setting is the default, and it should work reasonably well for most problems.
Iterative Default: This solver automatically chooses either Iterative A++ or Iterative B, depending on the frequency relative to the mesh element size. The solver is selected for each frequency point, so you can use this option to do a direct simulation from DC to very high frequencies. If the Iterative B solver is chosen and the solution fails to converge, the Iterative D solver is automatically tried in a second pass.
Direct Default: This solver automatically chooses either Direct (low frequency) or Direct (high frequency), depending on the frequency relative to the mesh element size. The solver is selected for each frequency point, so you can use this option to do a direct simulation from DC to very high frequencies.
Iterative A: This solver is primarily used for relatively low frequencies (down to DC), although there should be no loss of accuracy at higher frequencies. The disadvantage of using this solver at high frequencies is that the convergence is often not as good.
Iterative A+: This solver is similar to the Iterative A solver, except it uses a different preconditioner that has better convergence for selected problems (the preconditioner is more expensive though).
Iterative A++: This solver is similar to the Iterative A solver, except it uses a different preconditioner that usually has better convergence, potentially at the expense of longer preconditioner creation times, and more memory usage. This solver has the best convergence properties of the Iterative A family of solvers, but it is also the most expensive.
Iterative B: This solver is the default Iterative solver for higher frequencies. The performance and convergence properties for this solver are quite good, so this solver is often the preferred solver for most problems except at very low frequencies (where one of the A solvers must be used).
Iterative C: This solver is similar to Iterative B with a different preconditioner that might work better for selected problems.
Iterative D: This solver is similar to Iterative B with a different preconditioner that might work better for selected problems.
Direct (low frequency): This solver is a Direct solver that you can use down to DC. The Direct solvers use significantly more memory and time than the Iterative solvers for large problems. The Direct solvers make fewer approximations though, so it is sometimes useful to use them to verify the accuracy of the Iterative solvers (when the problem size is small enough to run in a Direct solver). Also, if none of the Iterative solvers converge to a solution, then the Direct solver might be the only option available.
Direct (high frequency): This solver is a Direct solver that should work well for all problems that are not simulating at a very low frequency. The Direct solvers use significantly more memory and time than the Iterative solvers for large problems. The Direct solvers make fewer approximations though, so they are sometimes useful for verifying the accuracy of the Iterative solvers (when the problem size is small enough to run in a Direct solver). Also, if none of the Iterative solvers converge to a solution, then the Direct solver might be the only option available.
This setting controls the accuracy of the matrix entries. Increasing the accuracy of the entries can improve the accuracy of the solution at the expense of longer simulation times. The default value is conservative and usually gives good overall accuracy. Structures with very tight coupling (such as a thin film capacitor) require relatively accurate matrix entries for an accurate solution. Problems that involve signal lines without any tightly coupled geometries can often have the matrix accuracy reduced without significant degradation of the overall solution accuracy, and a significant reduction in the matrix fill time.
The de-embedding option performs an additional post-processing step on the data to remove the effects of parasitics associated with the ports. The parasitics associated with the ports in AXIEM are relatively small, so it is not always necessary to de-embed. De-embedding is recommended for simulations that require very high precision (such as the simulation of a very small discontinuity like a bend), or when a reference plane shift is desired for the port solution (when a reference plane shift is specified on a port, it is only used if de-embedding is enabled).
Note that de-embedding can lead to causality issues, but it does not mean the solution is incorrect. For example, in the following structure, if the substrate height is large relative to the width of the line, the electrical length of the two lines connected by the corner can actually be shorter than the total electrical length of the two lines added together. The energy associated with the transmission line mode “cuts the corner” and the effective electrical length of just the corner can be negative. The de-embedded solution for the corner is non-causal, because it has negative electrical length, but it is the correct solution, because it correctly predicts the electrical length when each edge of the corner is connected to a transmission line. The solution for the corner only makes sense when viewed in the context of what it is connected to (a line-corner-line combination).
Advanced Frequency Sweep (AFS) speeds up EM simulations of EM structures through an optimal choice of the frequencies at which to perform the EM simulations. AFS saves time by significantly reducing the number of points at which the EM simulations need to be performed, while still maintaining the required accuracy.
The following AFS options are available. You may need to click thebutton in the Element Options dialog box to see all of the options.
You can use the AFS option to compute the solution at a large number of frequencies by computing the solution at a much smaller set of frequencies. To use AFS, specify all of the frequencies at which you desire a solution. Choosing more frequency points does not significantly affect the solution time, so it is usually better to specify a relatively large number of frequencies (a few hundred for example). If you specify too few frequency points, there may not be enough points to fit the solution. If AFS simulates all of the specified frequencies, however, then an AFS fitting is not used (the same as running without AFS). Only the frequencies simulated are stored in your project, so the number of frequencies requested does not affect the file size. If you request a very large number of frequency points, you should also limit the number of frequency points to simulate by setting a Max # sim pts value.
When switching AFS options (such as Max # sim pts or Tol (dB)), the previously simulated frequencies are not resimulated. You can also add more frequencies and previously simulated points are used, unless you add a higher frequency to the frequency list. In this case, the mesh will likely change and therefore all the frequencies must be recalculated.
The tolerance is a relative number (in dB) that controls the accuracy of the AFS solution. A lower tolerance setting requires fewer frequency points, but the accuracy of the solution might not be acceptable. Also, if the tolerance is too loose, the AFS result may have a "false convergence". If you adjust this option, 5 dB steps are recommended.
During simulation, you can watch the Simulation status dialog box to see the status of AFS convergence. AFS must first simulate three frequencies; after these frequencies you can view a status window that looks similar to the following figure.
This line includes the number of points out of the total grid points (frequencies specified for the AXIEM structure). You can then see the convergence error and brackets ([* * * *]). For AFS to converge, the convergence error must be less than the tolerance specified. Additionally, there are four checks for convergence that are specified in the brackets. When the individual checks are met, that entry in the brackets displays a letter instead of the "*" symbol. The checks and corresponding letters used are:
D = Data points. The data points criterion requires the fitting error between the data samples (computed points) and the rational macromodel to be less than a specified tolerance.
R = Reflective functions. The reflective functions are a set of rules that evaluate the correspondence of the magnitude and phase of the best two rational macromodels.
H = Heuristics. The heuristic criterion requires a minimum number of data samples (computed points) before convergence.
P = Passivity. The passivity criterion requires the passivity of the rational macromodel to be close to the passivity of the data samples (computed points).
In this example, the last frequency looks similar to the following figure.
The same information is stored with each AXIEM structure in the Simulation log so you can see the history of what AFS did after the simulation is complete. You may need to subdivide the simulation band into sub-bands for AFS fitting. The simulation log reports multiple messages from the simulation of each of the sub-bands.
The AFS algorithm always chooses its sampling points at requested frequency points, but you can use this option to limit the maximum number of frequency points chosen. .
AFS band limiting allows you to perform AFS in a specified frequency range. Any frequency outside of the range is individually simulated. The Start Freq and Stop Freq options define the frequency range for the AFS band limits. During the simulation, the frequencies outside the band are simulated first and then the frequencies inside the band get simulated.
You can apply this option when simulating very wide bandwidths of structures. This is commonly done for structures simulated with harmonic balance, where accurate impedances are needed up to many harmonics of the fundamental frequencies. In this case, the impedances seen at the fundamental frequencies need to be accurate, so AFS is used in that band. It would be problematic using AFS for the full band to find the accurate fit, so the frequencies for the higher harmonics can be done point by point, resulting in a more efficient overall simulation.
The following graph demonstrates the effect of the AFS band limit. The graph has two plots of the S21 phase of the same line with AFS band limit turned on for the top plot and turned off for the bottom plot. The AFS band limit is from 30 to 80 GHz; note that the bottom plot has more points inside the band than the top plot does, because the top plot is performing AFS inside the band.
When AFS is enabled, only a small subset of the frequency list is simulated. As a result, EM currents, antenna annotations, and antenna measurements are plotted for the simulated frequencies only, not the entire frequency list. When plotting any of these measurements, you must choose FSAMP for the Sweep Freq option in the Add/Modify Measurement dialog box, as show in the following figure. Because the FSAMP frequencies are not determined until after a simulation, the frequency list for FSAMP displays "Freq = 0 GHz". After simulation, the annotation or measurement automatically plots for the first FSAMP frequency. At that point, you can choose any of the FSAMP frequencies.
The following preset options are available:
Fastest: Sets all the options to the values that make the solver as fast as possible, although the accuracy might not be acceptable. In general, the results with nominal option values set should be used to validate the solution when all options are set for fastest execution.
Defaults: Resets all AXIEM options to default values, including user-accessible and internal options. Internal options can change from one version of the software to the next, so for older projects, it is often beneficial to reset the defaults for better performance. (If you have a project created with beta software, you should reset the defaults.) If any of the AXIEM dialog box options display a [Custom_Setting] value, you should select this option to return them to a user settable value. If you have EM structures that worked in a previous version but do not work in a newer one, try resetting the defaults before contacting NI AWR Support.
Most Accurate: Sets all the options to the values that give the most accurate solution. In most cases, the values set are too conservative, and simulation times are much slower than with default values, but this can be useful for verification.
The following Iterative solver options are available:
Compression Accuracy: The Iterative solvers compress the matrix to solve. A lower compression accuracy can result in a faster simulation and less memory, at the expense of accuracy. If you suspect accuracy issues with the Iterative solvers, try using a higher compression accuracy. For some problems, using a lower accuracy only has a minimal effect on the total solution accuracy, but you should be careful to validate this when using lower accuracy settings.
Pre-conditioner Efficiency: Using a larger preconditioner size can often reduce the number of iterations needed per solve, at the expense of more memory usage and potentially longer simulation times. If the preconditioner size is larger, then the time spent creating the preconditioner is longer (and uses more memory), but there is a time savings in the solve phase if there are fewer iterations. For structures with many ports, it might be beneficial to use a larger preconditioner, as a solver is needed for each port, although the preconditioner only needs to be created once. If the Iterative solver is not converging (or converging with a large number of iterations), then increasing the size of the preconditioner is recommended.
Max Iterations: This option sets the maximum number of iterations allowed before non-convergence is determined. If a solver is not converging, you can try doubling the number of iterations a few times. After this value reaches about 5000, if the problem is still not converging, it is likely that continuing to increase it won't help, and it is better to try other options (such as increasing the size of the preconditioner, increasing the subspace size, or changing the solver type).
Subspace Size: This option controls the size of the Krylov subspace the Iterative solver uses. Using a larger size can help convergence, although at the expense of memory. Very large subspace sizes can consume a great deal of memory when used on large problems, so you should be careful not to set this option too large for large problems. An upper limit of a few thousand is recommended.
Convergence Tolerance: The convergence tolerance controls the tolerance at which the solution is considered converged. Using a looser tolerance should require fewer iterations, at the expense of accuracy. If you change this option, you should change the value by order of magnitude increments.
The following are the most common Iterative solver convergence issues.
When using the Iterative solver, you may encounter convergence problems. This information does not apply to the Direct solvers.
One cause of convergence issues is low frequency break down. Low frequency break down occurs at frequencies where the mesh elements are very small relative to a wavelength, so the frequency at which this occurs depends on the size of the structure relative to a wavelength. AXIEM uses specialized solvers that avoid the low frequency breakdown problem, but it is important that the correct solver is used. All of the Auto configure solver choices automatically choose the correct solver based on frequency and mesh element size. All of the "A" Iterative solvers are suitable for low frequency problems, as well as the Direct (low frequency) solver. At DC, low frequency solvers are the only viable option. For high frequency solvers, the conditioning of the problem worsens (which causes poor convergence) as the frequency is lowered, and at DC, the system is not solvable by the high frequency solvers. For low frequency solvers, the conditioning of the problem worsens as the frequency increases, so at very high frequencies, the low frequency solvers may encounter convergence issues. For a fairly broad range of frequencies that are not too high or too low, both solver types work well (for some problems, the low frequency solvers work well up to very high frequencies). It is important to note that the low frequency solvers are solving the same problem as the high frequency solvers, so there is no approximation involved with one or the other. The choice of the solver is driven by convergence issues (except at frequencies at or near DC, where only the low frequencies solvers are applicable). You can experiment with the different solvers to see how they perform on particular problems.
Some geometries lead to poorer conditioned problems than others. It is not always possible to predict which geometries will have convergence issues, but there are a few common situations that cause more difficulty for the Iterative solvers. One of these situations involves closely spaced conductors, such as a parallel plate capacitor with a very thin spacing between the plates. AXIEM has very robust preconditioners that often solve these problems without any issues, but the number of iterations might be significantly higher than in easier cases. Another related situation which can cause convergence issues is when relatively thin conductors are modeled with all surfaces (Model as zero thickness is off). This problem is very similar to the capacitor problem, because the top and bottom surface of the conductors is very close. The convergence issues for this situation are often worse than for a thin capacitor, likely because for a conductor modeled with thickness, there is a higher proportion of the problem that has very closely spaced surfaces. For this reason (and also because the number of unknowns is much higher), NI AWR recommends that conductors be modeled with zero thickness, unless the thickness of the conductors is large enough to have a significant effect on the solution (for many common geometries, the zero thickness approximation works very well). When the conductors are very thick, the negative effect on convergence is diminished, although it still requires significantly more unknowns.
Another option for conductors that are not too thick is to model the thickness but exclude the top surface . This option can work well when the conductor is not too thick, but the performance of the circuit is very sensitive to precise modeling of edge coupling effects (such as in a filter or coupler). Enabling this option both improves convergence (by eliminating the closely spaced top surface), and reduces the number of unknowns. When using this option, you should experiment to see how it affects the problem types being analyzed.
The solver choice can have a significant impact on convergence. As discussed previously, at DC or very low frequencies, only the low frequency solvers are applicable, but for other problems, you can try either low or high frequency solvers. The solvers that generally converge best are the Iterative A++ for low frequencies, and Iterative B for high frequencies, although the reverse may also provide the best results. There may be situations where other solvers work better as well, so if you encounter convergence issues you should try other solvers. For problems where convergence is not an issue, other solvers may be significantly faster (for example, Iterative A is usually faster on problems that converge well).
Many of the Iterative solvers allow you to adjust the amount of information in the preconditioner. Having a larger preconditioner (more information), usually improves convergence, at the expense of longer preconditioner creation time and more memory usage. Problems with multiple ports require an iterative solution for each port, but the preconditioner only needs to be formulated once, so it is often advantageous to use a larger preconditioner when the structure has many ports. In this case, the preconditioner takes longer to create, but there is a time savings in the iterative solution for each port due to fewer iterations. Not all solvers implement variable size preconditioners though (Iterative A uses a diagonal preconditioner, so this setting has no effect when using this solver). The default Iterative solvers do implement variable size preconditioners (Iterative A++ and Iterative B).
Increasing the maximum number of iterations can sometimes lead to convergence. The progress of the lower Status bar in the Status Window displays the error function value (in dB), so you can see how close the solver came to converging by noting how far to the right the Status bar moves during the iterative solve step. Once the bar reaches 100%, the problem should have converged.
Using a larger size can help convergence, at the expense of memory. Very large subspace sizes can consume a great deal of memory when used on large problems, so you should be careful not to make this setting too large for large problems. An upper limit of a few thousand is recommended. Each time the iteration count reaches the subspace size, the solver 'resets', which can cause stagnation in convergence. If you suspect this is occurring, try increasing the subspace size (if memory permits).
Usually, this setting does not have a large effect on convergence, as once the solution starts to converge, it usually converges very well to very high accuracy. Nevertheless, there might be situations where the Status bar indicator shows that the problem nears convergence but never quite gets there. For these situations, try loosening the tolerance in steps of a factor of 10 to see when it converges. This setting can be set as loose as 0.01 with reasonable result accuracy. A convergence tolerance looser than 0.01 is generally not recommended.
The accuracy of the solution is equated with the accuracy of the S-parameters the solver computes, and is very problem-dependent. The defaults in AXIEM are chosen to give good accuracy across a wide range of problem types, thus they are often overly conservative for many problems. Having more accuracy than needed is usually not a problem, but the settings that provide extra accuracy cause longer simulation times and use more memory. Therefore, it is often better to lower some of the accuracy settings to make the simulation faster or to save memory.
The accuracy required from AXIEM is very problem-specific. Certain types of problems are inherently more sensitive to errors than others. For example, distributed filters (particularly ones with high Q resonators), are often very sensitive to the accuracy related settings. Parallel plate capacitors are also quite sensitive to accuracy settings, particularly when the gap between the plates is very small. At the other extreme, structures that represent interconnect routing, where coupling is more of a parasitic effect as opposed to a circuit component, are relatively insensitive to the accuracy settings. With a structure that is insensitive to the accuracy settings, you can significantly speed the simulation time and reduce the memory requirements by appropriately adjusting the settings.
The compression level affects simulation time, accuracy, and memory usage. In general, you should set this to just enough accuracy to achieve the desired solution accuracy. Setting the compression accuracy higher than needed does not improve the accuracy, but it can have a dramatic effect on memory usage and simulation time, therefore it is important not to use more accuracy than needed. You should also be very careful when decreasing the accuracy, as the overall solution accuracy tends to degrade very quickly once it gets below the 'just enough' accuracy point. To provide a margin of safety, by default, the accuracy is set to a level about one step above the setting that provides just enough accuracy. For many problems, reducing the accuracy by one step has a minimal impact on accuracy, but you should verify this on the problem being simulated.
Setting Matrix entry accuracy to Medium (the default) works well for most problems, including those that are sensitive to accuracy issues. For all but the most sensitive problems (for example, a parallel plate capacitor with a very small gap between the plates), Medium- also works well, and is much faster. For structures such as interconnects that are not sensitive to the accuracy settings, you can often achieve good results using Low-.
The preconditioner size does not affect accuracy, but it affects performance. As discussed in the prior convergence section, it is often advantageous to use a larger preconditioner when the structure has many ports. The preconditioner takes longer to create, but there is time savings in the iterative solution for each port due to fewer iterations. In general, it is difficult to predict how changing the preconditioner size affects performance, as using a larger preconditioner increases the time spent creating the preconditioner, while typically decreasing the time spent in the Iterative solver. Whether this is a net gain or loss is problem-dependent, so you may need to experiment to optimize performance.
The following are current AXIEM limitations for dielectric and magnetic materials:
No support for general anisotropic dielectrics. Supports only uniaxial dielectric materials in the dielectric stack-up.
No support for finite dielectric brick, which is considered a 3D planar shape. (Shape in the layout cannot be assigned the property of a dielectric.)
No support for using conductor material in the stackup definition as the material of a stackup layer.
Material properties of the layout shape can be either a conductor or an impedance definition. When a conductor, only the bulk conductivity is used for computing the metal loss. The dialog box allows you to modify Er, Ur, Tand and TanM for a conductor definition, however AXIEM does not use these parameters, nor does AXIEM support anisotropic conductivity.
Sometimes the results from AXIEM are non-passive. Typically this is a result of very small numerical noise in the de-embedding process. You can force the data to be passive at every frequency, however, before you use this option, you should check your structure for the following:
Are you using explicit grounding for all your ports where possible?
Does your structure have any loss (loss tangent of dielectrics and metals other than perfect conductor)?
Are the top and bottom enclosures set properly? If you are simulating microstrip, the top of the structure should be set to Approx Open.
Does your mesh look reasonable?
The Enforce Passivity option applies a minimal change to the simulated data to enforce the passive data.
Passivity enforcement is controlled in the Options dialog box on the AXIEM tab. Right-click the AXIEM document in the Project Browser, choose to display the Options dialog box, click the AXIEM tab, and select the Enforce Passivity check box.
The best way to check the passivity of your structure is to use the passive linear measurement. See “ Passive: PASSIVE” for details.
This section provides helpful hints and advice for improving the accuracy of your results, and presents issues you should be aware of when working with AXIEM.
The first step in defining an EM structure is to set up the Enclosure. The Enclosure defines the physical properties of the EM structure such as dielectric and conductor properties, and it includes parameters that affect simulation as follows:
Grid: The Enclosure grid parameters (Grid_X, Grid_Y) define the drawing snap grid and determine the meshing size if Mesh Units is set to Relative to cell grid. For more information, see “Mesh Quality”. Generally, you should set the grid size to correspond to the desired mesh cell size. A grid size that is too small results in over-meshing and long simulation times, and a grid size that is too large results in under-meshing and loss of accuracy.
Boundary Conditions: AXIEM is an open boundary solver that can correctly solve radiation into open space. The EM structure is not defined within a metallic box; however, you can define conducting Top and Bottom Boundary conditions. Generally, it is best to define the Top Boundary as Approx Open unless you are trying to model the effects of a top cover.
Stripline: Set the Top and Bottom boundaries to Perfect Conductor or to a metal with conductivity specified on the Material Defs. tab of the Element Options - ENCLOSURE Properties dialog box.
Approx Open Top/Bottom Boundary: It is important to note that if the top layer specified in the dielectric stackup is not "Air", and the Top Boundary is set to Approx Open, the media above the top dielectric layer is modeled as "Air" with the relative dielectric permittivity equal to 1.0. Similarly, if the bottom layer specified in the dielectric stackup is not "Air", and the Bottom Boundary is set to Approx Open, the media below the bottom dielectric layer is modeled as "Air" with the relative dielectric permittivity equal to 1.0.
See “Enclosure Settings” for more detailed information.
There are many types of ports in AXIEM (see A Plethora of Ports: Making Sense of the Different Types of Ports in EM Planar Simulators” by Dr. John M. Dunn and “AXIEM Ports ” for more information.
Each of the AXIEM ports belong to either the Regular (Edge) ports or Differential ports groups.
Regular (edge) ports may have a connection to the ground (infinite upper/lower/both, finite). You may need in this connection to specify explicitly the return current path, so edge ports can have explicit or implicit ground reference. There are sets of mutual ports and sets of serial ports. Edge ports can belong to one of these sets, a mutual set, or a series set. All major properties of differential ports are related to the enforced Kirchhoff's current law that addresses the conservation of charge. It is therefore very important to remember that active devices and passive devices with internal ground connection (for instance, transmission line models) cannot be connected to the differential ports. Internal ports are actually differential ports with very small gaps between the “+” and “-” nodes. Series ports (two edge ports that belong to the same group where the “Type” of the group is “Series”) are actually differential ports with two nodes.
AXIEM can de-embed only edge ports and internal "gap" ports. The most accurate de-embedding algorithm was developed for edge ports with explicit reference to the ground. You cannot de-embed differential ports (including series ports) and edge ports that set up on internal (or "cut-in") edges, or on edges that are shared with vias. The best practice is to turn on de-embedding (the default) for a particular port only if you can de-embed the port. To do so, select the De-embed check box in the Port Attributes (Properties) dialog box. See “Port Attributes Dialog Box” for more information on this option.
You can also specify de-embedding for all ports in the EM structure by selecting the Enable De-Embedding (Global) check box on the Options dialog box AXIEM tab.
When you select this check box, AXIEM de-embeds all ports for which the De-embed check box is individually selected, and which are legitimate for this operation. If Enable De-Embedding (Global) is not selected, AXIEM does not de-embed any port regardless of its individual settings. After simulation, you should check the Status Window to verify whether or not the port is de-embedding, and the type of de-embedding applied.
The AXIEM edge port de-embedding technique is based on the simulation of an additional EM structure comprised from two identical segments of a transmission line. The thickness and the width of the transmission line are defined by the width of the edge and the thickness of the metal on the corresponding layer. The length of the traces depend on the width of the substrate and the width of the edge. You can see and examine the additional EM structures created for port de-embedding by using the AXIEM EM_DEEMBED_MESH annotation. See “Viewing De-embedding Standards” for more information.
See also “Port De-embedding” for more information.
Plated (Single-layer) Line Structures
In Monolithic Microwave Integrated Circuit (MMIC) technologies, plated line structures are commonly modeled as a metal-via-metal combination. This structure needs additional attention in order to de-embed correctly.
For example, consider the following plated line structure:
Top metal (M2) is 4um
Via (VIA1) between M1 and M2 is 2.5 um
Bottom metal (M1) is 2 um
Ground Plane is below M1
You can attach a port to any metal layer in the structure, however you should always attach the port to the metal layer closest to Ground. In this case, Port1 is set up on M1 as shown in the following figure.
Via is Inset from Metal
In this case, geometry simplification is not applied, so VIA1 is not snapped out to M1 and M2, as shown in the following figure. Port 1 is de-embedded. The structure used in the de-embedding algorithm is comprised of the traces on M1 (with the thickness of the corresponding metal). The mesh, however, is not desirable because it contains many extra small elements due to the slight inset of VIA1 from M1 and M2, leading to more unknowns for the solver. In addition, the mesh quality can potentially be very bad ("Mesh Sqrt(Area) Ratio" and/or "Mesh Aspect Extremes" can be high values).
Via is Coincident with Metal
VIA1 is snapped to the M1 and M2 shapes by Shape Pre-Processing, as shown in the following figure. The mesh quality is very good because of snapping. If set up correctly, Port 1 can still be de-embedded. The most accurate de-embedded results are obtained if the width of de-embedding standards equals the total width of the plated line structure, which in this cases equals the thickness of VIA1 + thickness of M2.
The Mesh Options dialog box includes a Max thickness for plated line port option for de-embedding ports on plated lines. You should specify a value for this option that is greater than the thickness of the plated line (in this case the thickness of the plated line = thickness of VIA1 + thickness of M2). For instance, if the thickness of VIA1 is 2.5u and the thickness of the upper metal plate is 4u, you can set the Max thickness for plated line port value to 7um to properly de-embed ports. If you set this value to anything smaller than the thickness of the plated line, the port de-embedding procedure is not performed. For instance, if you set Max thickness for plated line port to 1um, AXIEM does not de-embed ports with snapped vias.
See “Viewing De-embedding Standards” for more information.
Ohm's law works at low frequency when the volume current fills the conductor section. The resistance at low frequency is defined as RDC = 1/σt Where t is the metal thickness and σ is the conductivity.
Skin effect shows that at high frequency when the current constrained to the area adjacent to the metal surface, the penetration depth is defined as skin depth:
Since most current flows through a smaller cross-section, the high frequency resistance is rewritten as:
The overall impedance is composed from low frequency and high frequency resistance.
In AXIEM, conductors are modeled either as thin or thick. A thin model has mesh only on the conductor bottom (where the unknown current is solved); a thick model has mesh on all metal boundaries.
AXIEM only meshes the bottom of the conductor, therefore the unknown current is in only one layer. This results in fewer unknowns and faster problem solving.
You can turn on thin metal modeling in the Options dialog box on the Mesh tab by selecting Model as Zero Thickness.
AXIEM meshes all the metal surfaces in thick metal modeling, so the unknown current is on all sides of the metal surface. When the frequency is high enough, the skin depth is a fraction of the metal cross-section. At low frequency, the current is uniformly distributed inside the metal. The DC surface resistance must be doubled for current on the top and bottom layers, such that when they are in parallel, they give the correct DC resistance.
At high frequency, due to the skin effect, surface current flows on all sides of the conductor. In a thin metal model, since only the conductor bottom is meshed, all of the current is forced to flow on the bottom surface. This reduces the area in which current flows and the loss is over-estimated. To imitate the real current flow, we reformulate the high frequency resistance.
In AXIEM, you can turn on the enhanced thin metal model by selecting the secondary option Enhanced loss model for thin mesh. This option only applies to metal defined by conductivity and thickness. It does not apply to metal modeled by an impedance definition.
For thick metal modeling, at low frequency, a common practice in commercial EDA software is to redefine RDC=1/(σt/2)=2/σt. However this does not correctly represent the currents on the sidewalls and tends to under-estimate the loss.
To solve this problem, you need to investigate the volume current density and model it correctly with unknowns on all sides of the trades. So RDC is no longer a constant.
In AXIEM, this enhanced thick metal modeling is the default.
In the manufacturing procedure, copper foils are treated for roughness to increase adhesion. Conductor surface roughness has undesirable effects on the loss and dispersion (frequency dependence of ε eff) at high frequency, when the skin depth approaches the height of the roughness grooves. AXIEM can correctly capture these effects.
You can define effective conductor surface roughness (RMS) in the Element Options - ENCLOSURE Properties dialog box on the Materials tab.
Vias can be in any shapes, however most commercial software only uses the metal thickness defined in the material type to get DC resistance, which is often incorrect. AXIEM can calculate the DC resistance for vias in arbitrary shapes. You can select the secondary Alternative via resistance calculation option to better calculate loss for vias.
The numerical method used in AXIEM depends on a good surface mesh that is formed by triangles (or rectangles) with sides of approximately equal length (the ratio between the longest and shortest sides should be low). Conversely, if there is a very long triangle in the mesh where one side is much shorter than the others, the system of linear equations that need to be solved becomes ill-conditioned, and the Iterative solver may fail to converge.
AXIEM displays mesh statistics when the Output mesh element extremes check box is selected in the Mesh Features area of the Options dialog box Mesh tab. The statistics include the ratio of the area of the biggest mesh element to the area of the smallest element and the ratio of the side lengths of worst triangle in the mesh.
If there are no problems with Iterative solvers and the number of iterations is small, the mesh is fine. However, it is always good to check the mesh element extremes. If the reported values are small, the mesh is good and no other steps are needed. However, if the mesh ratios are large (> 1000), then the mesh can potentially cause problems. The first indication of a poor mesh is that AXIEM fails to converge with default settings. If this occurs, try increasing the accuracy setting. The Iterative solver uses more iterations and the obtained solution may be acceptable. If the frequency range is not large (from DC to frequencies when the dimensions of the EM structure are about several wavelengths) and the Iterative solver takes more then 20-25 iterations to converge, verify that the resulting S-parameters are acceptable and are smooth with respect to frequency. You should also check passivity, symmetry of the S-parameter matrix (reciprocity condition), and energy conservation. To verify the passivity of the simulation results use the Microwave Office PASSIVE measurement in the Linear measurements group. To verify the energy conservation law use the Microwave Office SUMPWR measurement with the corresponding Port Index in the Linear measurements group.
See “AXIEM Meshing” for more information.
For information about AXIEM solvers, see “Solvers”.
AFS is designed to simulate fewer frequency points than the requested frequency list while delivering accurate S-parameter data at all points (simulated or not). When simulating simple components with relatively small mesh (for example, with the number of unknowns less than 1000), AFS is not necessary. The S-parameters as functions of frequency are relatively smooth functions, there is no need to sweep frequency with very small steps, and the EM simulations per frequency point are not time consuming. However, if the EM structure has unknown counts above 50000, there is no alternative to AFS; you must use it in frequency sweeps.
If AFS does not converge within the specified number of frequency points:
Increase the accuracy level settings for the Iterative solvers. In the Options dialog box on the AXIEM tab, set the Matrix entry accuracy to High+, and the Preconditioner Efficiency and Compression Accuracy to High . S-parameter function may have some steps or oscillations that are the result of an ill-conditioned system of linear equations and/or relaxed accuracy settings. AFS cannot differentiate between the real physical resonances and artificial numerical effects.
Divide the whole frequency sweep into smaller regions.
Increase the Max # sim pts.
NI AWR has very good, accurate EM-based models for stripline, coupled stripline, and stripline inhomogeneities. These models may be sufficient for your design; they are located in the Element Browser under the Circuit Elements Stripline category. Use AXIEM only if you need to take into account the EM effects of finite ground planes, coupling effects with other components in designs, or reflection from other obstacles or inhomogeneities (for example, vias to other levels).
Stripline Port Setup with Infinite Ground Planes: In stripline, the return current to the ports flows on both the upper and lower ground planes. However, using a port with an unbalanced explicit ground reference (Connect to lower or Connect to upper ) results in non-symmetric current return (only to top or bottom ground planes), which causes incorrect simulation results. The most accurate results are obtained by selecting Connect to both as the Type in the Port Attributes dialog box.
Stripline Port Setup with Finite Ground Planes: Ports with implicit ground reference should only be used with infinite ground planes (Top or Bottom Boundary), and should not be used to simulate stripline with finite ground planes. In this case, you should use differential ports with ground returns placed on both the upper and lower finite ground plane. If necessary, a small patch can be drawn on the ground planes to create an edge to which the negative terminal of the port can attach.
Thick Metal: Unlike microstrip, the input impedance of stripline depends on the thickness of the conductor. The distributed capacitance between the stripline and the ground plane depends on the distance between the line and ground planes. If the thickness of stripline is increased, the distance from the top surface of the line to the upper ground decreases, and consequently the capacitance is different. For instance, the characteristic impedance of a thin stripline (0.1um) structure is 57 ohms, and the characteristic impedance of the same structure with conductor thickness of 35um is 52 ohms.
You should select the Include Resistive/Dielectric Losses option in the Add/Modify Measurement dialog box to calculate antenna gain for antenna radiation pattern measurements. You can determine the losses from the following calculation. The original energy generated by the source, Pin, is a known quantity, since the source in AXIEM is a power source, and not a voltage source. You can also calculate both the reflection coefficient and the amount of energy transferred into the antenna (Pin - Prefl). In addition, you can also calculate the total energy radiated into free space, Prad. As a result, using simple math, you can determine the losses in the antenna: Pin - Pref - Prad. This value also includes the losses in the dielectric.
AXIEM antenna measurements Con_EPhi, Con_ETheta, PPC_EPhi, and PPC_ETheta return complex values. In addition to magnitude, you can plot the phase far-field pattern. Phase angles are measured relative to the phase center of the antenna (the reference point where the phase angle is 0).
The phase center for antennas in AXIEM is always located at the origin of the layout coordinate system (X=Y=Z=0). It is important to know that the plane Z=0 is located at the bottom of the lowest layer specified on the Dielectric Layers tab of the Element Options - ENCLOSURE Properties dialog box. If the lowest layer is free space ("Air") and the Bottom Boundary is Approx Open, then the Z=0 plane is at the bottom of the free-space layer. The thickness of the free space layer is irrelevant for all antenna measurements except for phase patterns.
NOTE: The Approx Open Top/Bottom Boundary condition implies that there is an open half-space above/below the first/last layer defined in the dielectric stackup. The electromagnetic properties of the half-space are the same as free-space.
When the stackup contains any dielectric layer other than air, the radiation pattern along
the horizon (theta=90degree) should be ignored. For an AXIEM simulation, the assumption is that
the stackup extends to infinity along the horizon (directions parallel to the substrate
interface). When the stackup contains a non-air layer, the surface wave is excited for an
antenna problem that contains an open boundary. Otherwise, if both the top and bottom
boundaries are closed, parallel plate mode exists. Both surface wave and parallel plate mode
have magnitudes that are inverse proportional to the square root of distance from the source
r. They are not considered part of the far-field which is assumed to be
inverse proportional to the distance