AWR Microwave Office and Analog Office Features

Documentation: “Determining Project Units”.

Example: AWR_MMIC_Module.emp

Documentation: “Harmonic Balance Lossless Tuner with Bias Tee with N Harmonics (Closed Form): HBTUNER3 ”.

Documentation: “Rectangular - Real/Imag Graphs”.

Example: Simulated_Load_Pull.emp

Example: Swept_Load_Pull_Measurements.emp

Added support for vendor library components including capacitors, inductors, and resistors. Vendor component selections can be exported and imported into Network Synthesis instances.

Added API access to vendor library components in the wizard.

MSTEPs can now be used when Replace TLines with MLINs is selected on the Network Synthesis dialog box Components tab in the Topology constraints section.

A new synthesis measurement, CompCount, can be used to set a limit for the number of unique vendor library components or lumped elements used in a matching network.

Parameter limits for the first and last components in a matching network can now be set independently.

Documentation: “Network Synthesis Wizard”.

Documentation: “Loop Gain Envelope (2 port only): LoopGainEnv”.

Documentation: “Gain Margin for LoopGainEnv (2 port only): GainMrgnEnv”.

Documentation: “Phase Margin for LoopGainEnv (2 port only): PhMrgnEnv”.

Documentation: “Nonlinear Loop Gain Envelope (2 port only): NLLoopGainEnv”.

Documentation: “Gain Margin for NLLoopGainEnv (2 port only): NLGainMrgnEnv”.

Documentation: “Phase Margin for NLLoopGainEnv (2 port only): NLPhMrgnEnv”.

Documentation: “APLAC Linear Subcircuit Caching”.

Documentation: “Transmission Line Calculator Dialog Box”.

Documentation: “Optimization Log”.

Documentation: “Kapu Optimization”.

Documentation: “PCB Import Wizard”.

Documentation: “Minimum Spacing Routing Guides”.

Documentation: “Shape Edge Selection”.

Significant improvements in the mesh quality with a focus on elimination of high aspect ratios. Vertical mesh aggregation also reduces unknown counts in the z-dimension. AXIEM is now capable of meshing larger structures faster.

Greens function improvements from improved modeling of loss boundary conditions on the top and bottom enclosure, and improved modeling of very thin layers.

Sub-nanometer z-axis resolution of metals and dielectrics, resulting in better modeling of MIM capacitors. Previously, z-axis distances were rounded to the nearest nm.

Addition of a true DC solver resulting in more robust solutions at 0 Hz.

You can now run Analyst simulations from AWR Design Environment software on a remote Linux cluster.

NOTE: This is an early access feature.

The new linear solver introduced in v14 (dubbed HMLU) is extended to use multiple nodes on a Linux cluster, enabling solution of substantially larger problems than can be performed on a single computer. This allows the matrix solution at a single frequency (as part of a fast or discrete sweep) access to the total combined memory these nodes offer. For example, problems in excess of 100M unknowns have been solved to date on nodes each with less than half a terabyte of memory.

Meshing is both faster and more robust, particularly on very complex geometries containing many small entities.

You can now optionally define the mesher curvature geometry representation size in absolute units. Previously you could only specify a value relative to the element size. This change also controls the definition of the minimum element size that the curved geometry representation can cause.

Lumped RLC circuit element can now be added to Analyst arbitrary 3D EM Structures. These are implemented as an enforced frequency-dependent impedance between two points, where the RLC components can be in either a parallel or a series configuration.

In previous Analyst versions, the imperfectly conducting metal on a wave port was replaced with perfectly conducting metal. This was an efficiency and is appropriate in most situations. However, in cases where the losses are significant, this approximation can lead to lower accuracy solutions, particularly if a reference-plane shift is applied at the port. In v15, losses on the port are added in the same way as in the 3D problem, with the exception that modeling is not allowed inside metal on a port. Metal is converted to impedance boundary conditions applied to the metal surface, and the calculation of the impedance value includes skin-depth effects (limited by metal thickness). The primary impact of this change is higher accuracy results for high-loss cases where a reference-plane shift is used at the port.

Driven frequency simulations now use significantly less memory when requesting near or far field output, especially when requested at many frequencies.

Various aspects of the solver are faster, most noticeably for large point count simulations. Additionally, fast frequency (GAWE) sweeps make better use of parallel resources.

The PML (Perfectly Matched Layer) attribute is modified for better performance.

AMR memory estimates are improved in driven frequency (RF3p) simulations, allowing improved use of parallel resources.