AWR Microwave Office and Analog Office version 15 software includes the following new features, enhancements, and user interface changes. The AWR Design Environment suite changes also apply to these specific products.
Units, Grid, and Default Value parameters are now specified per-LPF, enabling multi-technology projects with mixed units. For example, a design for a chip might use units of microns for length, while the board the chip is mounted in could use units specified in mils for lengths.
Documentation: “Determining Project Units”.
The updated Load Pull script uses the new HBTUNER3 element to control impedances at up to three additional frequencies: the 4th and 5th harmonics of the fundamental, and the “baseband” frequency; F=|F1-F2| when a 2-tone input is used. As with the fundamental, 2nd, and 3rd harmonics, these impedances can be fixed at a specified value, or swept as part of the load pull analysis. Load pull measurements also accommodate these enhancements. Load pull measurements can now also be plotted on the new Rectangular - Real/Imag graph, which plots the real and imaginary components of a complex measurement on a rectangular grid instead of a Smith Chart or Polar graph.
Documentation: “Rectangular - Real/Imag Graphs”.
Network Synthesis Wizard improvements include:
Added support for vendor library components including capacitors, inductors, and resistors. Vendor component selections can be exported and imported into Network Synthesis instances.
Added API access to vendor library components in the wizard.
MSTEPs can now be used when Replace TLines with MLINs is selected on the Network Synthesis dialog box Components tab in the Topology constraints section.
A new synthesis measurement, CompCount, can be used to set a limit for the number of unique vendor library components or lumped elements used in a matching network.
Parameter limits for the first and last components in a matching network can now be set independently.
Documentation: “Network Synthesis Wizard”.
Stability analysis using loop gain envelope calculations can now be performed with the addition of new linear and nonlinear loop gain envelope measurements. Calculating the loop gain envelope requires far fewer computations than loop gain calculations, resulting in a much faster stability analysis than stability analysis based on loop gain.
NOTE: This is an early access feature.
Documentation: “Loop Gain Envelope (2 port only): LoopGainEnv”.
Documentation: “Gain Margin for LoopGainEnv (2 port only): GainMrgnEnv”.
Documentation: “Phase Margin for LoopGainEnv (2 port only): PhMrgnEnv”.
Documentation: “Nonlinear Loop Gain Envelope (2 port only): NLLoopGainEnv”.
Documentation: “Gain Margin for NLLoopGainEnv (2 port only): NLGainMrgnEnv”.
Documentation: “Phase Margin for NLLoopGainEnv (2 port only): NLPhMrgnEnv”.
In hierarchical designs where there are many instances of a subcircuit, APLAC linear simulation times can be significantly reduced by using subcircuit caching.
Documentation: “APLAC Linear Subcircuit Caching”.
Parallel and remote circuit simulation enables multiple AWR Microwave Office simulations to run simultaneously on the same computer, or remotely in parallel on multiple computers in a simulation queue. Long simulations, such as complex harmonic balance simulations, linear simulations involving extremely large S-parameters, parameter sweeps, load pull simulations, optimization, and yield analysis may benefit from a significant reduction in simulation time when run in parallel.
NOTE: This is an early access feature.
You can now synthesize select circuit models based on electrical specifications by right-clicking on the model and choosing. The physical parameters are automatically populated with the model parameters and associated substrate. Supported transmission line/coupled transmission line elements are MLIN, MCLIN, SLIN, SCLIN, S1LIN, CPW1LINE, RWG_TEmn, COAX, and COAXC.
Documentation: “Transmission Line Calculator Dialog Box”.
Optimizer improvements include the option to write an Optimizer log file and the new Kapu optimization method. If you select the log file option, there is a link in the Status Window which you can click on to open the log file. The Optimizer log file contains information on the Optimizer setup, details of each iteration, and a summary of the ten best iterations. Analysis of the log file may provide insight into how to set up future optimization runs more efficiently. The new Kapu optimizer blends local optimization with high resistance to local minima. It has been shown to work well on a wide range of designs with as few as 3 to over 90 variables.
You can now easily import Gerber PCB data into the AWR Design Environment for EM analysis using the PCB Import Wizard. Both Gerber X1 and X2 standards are supported.
Read-in performance for projects with large PCB designs is also improved. Some examples show as much as 3X improvement over version v14 for layouts with many shapes (not pCells).
Documentation: “PCB Import Wizard”.
You can now use minimum spacing routing guides and quickly route iNets as close as possible without violating DRC separation rules. The guides, drawn with a red line, represent centerline of the iNet which is routed as close as possible to the other shapes. Options included snapping to the guides as you route the iNet, and rejection of routing clicks inside the guide lines. The guides are dynamically calculated based on DRC separation rules and iNet widths.
Documentation: “Minimum Spacing Routing Guides”.
Layout edge selection is updated to allow multiple edge selection. When using thecommand with multiple edges selected, only the first edge on each shape is aligned. You can also perform more elaborate operations on multiple selected edges using scripts.
Documentation: “Shape Edge Selection”.
AXIEM improvements include:
Significant improvements in the mesh quality with a focus on elimination of high aspect ratios. Vertical mesh aggregation also reduces unknown counts in the z-dimension. AXIEM is now capable of meshing larger structures faster.
Greens function improvements from improved modeling of loss boundary conditions on the top and bottom enclosure, and improved modeling of very thin layers.
Sub-nanometer z-axis resolution of metals and dielectrics, resulting in better modeling of MIM capacitors. Previously, z-axis distances were rounded to the nearest nm.
Addition of a true DC solver resulting in more robust solutions at 0 Hz.
Analyst simulator improvements include:
You can now run Analyst simulations from AWR Design Environment software on a remote Linux cluster.
NOTE: This is an early access feature.
The new linear solver introduced in v14 (dubbed HMLU) is extended to use multiple nodes on a Linux cluster, enabling solution of substantially larger problems than can be performed on a single computer. This allows the matrix solution at a single frequency (as part of a fast or discrete sweep) access to the total combined memory these nodes offer. For example, problems in excess of 100M unknowns have been solved to date on nodes each with less than half a terabyte of memory.
Meshing is both faster and more robust, particularly on very complex geometries containing many small entities.
You can now optionally define the mesher curvature geometry representation size in absolute units. Previously you could only specify a value relative to the element size. This change also controls the definition of the minimum element size that the curved geometry representation can cause.
Lumped RLC circuit element can now be added to Analyst arbitrary 3D EM Structures. These are implemented as an enforced frequency-dependent impedance between two points, where the RLC components can be in either a parallel or a series configuration.
In previous Analyst versions, the imperfectly conducting metal on a wave port was replaced with perfectly conducting metal. This was an efficiency and is appropriate in most situations. However, in cases where the losses are significant, this approximation can lead to lower accuracy solutions, particularly if a reference-plane shift is applied at the port. In v15, losses on the port are added in the same way as in the 3D problem, with the exception that modeling is not allowed inside metal on a port. Metal is converted to impedance boundary conditions applied to the metal surface, and the calculation of the impedance value includes skin-depth effects (limited by metal thickness). The primary impact of this change is higher accuracy results for high-loss cases where a reference-plane shift is used at the port.
Driven frequency simulations now use significantly less memory when requesting near or far field output, especially when requested at many frequencies.
Various aspects of the solver are faster, most noticeably for large point count simulations. Additionally, fast frequency (GAWE) sweeps make better use of parallel resources.
The PML (Perfectly Matched Layer) attribute is modified for better performance.
AMR memory estimates are improved in driven frequency (RF3p) simulations, allowing improved use of parallel resources.
See Analyst 3D Editor Features for details on new features specific to the 3D Editor.
AWR Microwave Office v15 software includes the following minor new features, enhancements, and user interface changes.
The following are new or updated AWR Design Environment examples for v15. To find an example, chooseand type the example name.
The following new circuit models are included in AWR Microwave Office v15 software.
The following new circuit measurements/annotations are included in AWR Microwave Office v15 software.
The following new scripts are included in AWR Microwave Office v15 software:
: Add a DC (0 Hz) frequency point to data files that do not include it.
A new Variables collection off of Optimizer objects allows easier access to variables and parameters that are enabled for optimization.
Added access to the graph marker font and text color options through the marker options collection.
Added StackupUtil methods SetBoundaryCondition(), RemoveMaterial(), RemoveTrace()and UnMap(). Added SetStackup2() method which associates an EM structure and its STACKUP to a StackupUtil object.
A newcommand in the right-click context menu of a disassociated iNet converts the net from a disassociated route to an independent route path.
A new Layout Mode Drawing option, Flight lines nearest pin edge connects ratlines to the nearest area pin edge, rather than the cell face.
A new option on the Layout Options dialog box Layout tab, Auto-snap parameterized subcircuits snaps together elements in parameterized subcircuits after parameter values are applied.
Rectangles, circles and ellipses now draw animation in full color during design entry. Polygons now render fully filled during entry when the first and last entry points overlap.
Rectangles, circles and ellipses now have a corresponding tab in their Shape Properties dialog boxes that allows editing of their properties such as radius, width, and height.
The radius now displays on the cursor instead of dx/dy when drawing a circle. Circles remain circular when stretched, unless you hold down the Shift key to deform the circle into an ellipse. Coordinate entry for circles now just takes a value for radius instead of dx/dy.
The tooltip displayed for a data cursor on a graph trace for a PASSIVE measurement now indicates "Passive" or "Not Passive".
The tooltip displayed for a data cursor on a SCIR1, SCIR2, SCIR_IJ, MU1, MU2, K, or B1 stability measurement now provides a description of where the network is stable.
The NPORTF output file measurement now has two precision parameters: "Sweep Precision" and "Data Precision". These parameters allow the values for the independent variable (for example, frequency) to be written out with a different precision than the rest of the data.
The Analyst Delta S plot in the Simulation Window now uses a logarithmic y-axis for DeltaS.
Anoption is added to the Project Browser right-click context menu for Arbitrary 3D EM structures.
You can now Shift- double-click on a schematic node in the Project Browser to open the Layout View of the schematic