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5.3. Importing or Linking to a Netlist

You can import electrical models into the Cadence® AWR Design Environment® platform as third-party (HSPICE, Spectre, PSpice, and APLAC) simulator netlists, edit them as needed, and use them as SUBCKT blocks in schematics. The desired model must be a subcircuit definition in the netlist.

To import an existing netlist:

  1. Right-click Circuit Schematics in the Project Browser and choose Import Netlist, or choose Project > Add Netlist > Import Netlist.

    The Browse For File dialog box displays.

  2. Specify the type of file you want to import and locate the desired netlist. You can choose files of the following type:

    File Type Description
    APLAC Files (native) Netlist in APLAC format. Completely supports APLAC simulator syntax. Measurements must use an APLAC simulator in the AWR Design Environment platform. Files of this type have a .lib extension.
    AWR Netlist Files Netlist in AWR format. Files of this type have a .net extension.
    HSPICE Files Netlist in HSPICE® format is parsed so measurements can use any simulator. Supports commonly used HSPICE syntax. Files of this type have a .sp extension.
    PSpice Files PSpice file is translated into AWR format. Files of this type have a .cir extension.
    Touchstone Files Touchstone file is translated into AWR format. Files of this type have a .ckt extension.
    Spectre Netlist Files Netlist in Spectre™ format is parsed so measurements can use any simulator. Supports commonly used Spectre syntax. Files of this type have a .scs extension.
  3. Click Open to copy the file and include it in the project. A netlist window opens in the workspace, and the Project Browser displays the imported netlist as a node under Netlists.

Alternatively, you may want to access a netlist without copying it into the project. To link to a netlist, right-click Netlists in the Project Browser and choose Link To Netlist. The Browse For File dialog box displays. Locate the desired netlist, and click Open to make the file part of the project. A netlist window opens in the workspace, and the Project Browser displays the linked netlist as a node under Netlists.

NOTE: When you link to a netlist, that file must always be available for the project to read.

When you add an imported netlist model to a schematic as a subcircuit, the node names on the SUBCKT block correspond to the nodes in the netlist line(s) that define the subcircuit. For example, if an imported HSPICE subcircuit netlist starts with “.subckt MyModel 4 5 6”, the SUBCKT block for MyModel has node numbers 4, 5, and 6.

A subcircuit definition in a netlist can include a list of parameters (usually after the terminal node list). When this subcircuit is placed in a schematic, the parameters display with the SUBCKT symbol. The following is an HSPICE netlist example. The symbol that displays when you place it in a schematic is shown in the following figure.

.SUBCKT MyNMOS 1 2 3 4 W=1u L=0.1u

M1 1 2 3 4 mname W=’W’ L=’L’

.MODEL mname NMOS (LEVEL=3 …


Placing the imported netlist model as a single subcircuit in an otherwise empty, and similarly named schematic (as follows, on the left) provides the flexibility illustrated by the following figure and description:

5.3.1. Imported Netlist Types

The following sections provide import information for individual netlist types. HSPICE Netlist Files (*.sp) and Spectre Netlist Files (*.scs)

  • These files can contain multiple subcircuit definitions and references to external files using the corresponding simulator’s library reference syntax.

  • Text in the file is imported without any modifications, but is parsed during import, and before simulations.

  • Any messages from the parser display in the Status Window.

  • If the file is successfully parsed, schematics containing subcircuit(s) from it can be analyzed by any simulator (measurements on those schematics can specify any simulator).

  • When placing a SUBCKT block or editing its NET parameter, specific subcircuit definitions in the netlist are identified as filename>subname; where filename is the name of the netlist (without extension), and subname is the name of the desired subcircuit, as defined in the file.

  • Most SPICE netlist files are written using standard SPICE 2G6 syntax, so you can import them as HSPICE netlist files. To do so, change the file extension to .sp, import the netlist, and check for any parsing messages in the Status Window. APLAC Netlist Files (native) (*.lib)

  • When a netlist is imported as “native”, it can only be analyzed by the simulator for which it was written. For example, if a subcircuit model from a native APLAC netlist is included in schematic “A” or the hierarchy below “A”, then measurements with “A” as their Data Source must specify an APLAC simulator.

  • Native netlists are not restricted by parser limitations. They can include any syntax the simulator supports.

  • A native netlist represents only one subcircuit-- the top level subcircuit if there is a hierarchy with multiple subcircuits. Ideally, the top level subcircuit is the first subcircuit defined in the file.

  • The AWR Microwave Office program lightly parses the netlist to determine the name of the subcircuit, the number of nodes, and any parameters and their default values-- just enough information to place it as a SUBCKT block in a schematic.

  • For simulation, the main circuit netlist written by the AWR Microwave Office program includes any native netlist's subcircuit definitions without modification (native netlists are fed directly to the circuit simulator). AWR Microwave Office software only ensures that instances referring to it have the proper connections (node numbers) and parameters. PSpice Files (*.cir) and Touchstone Files (*.ckt)

  • These netlists are translated to AWR format during import.

  • After import, any simulator can analyze the translated netlist.

  • To edit the netlist in the original syntax, do so before importing it. Remove any previously imported version from the project and import the newly edited version.

  • Translator messages display in the Status window after import. Some information in the form of comments may also be included in the translated/imported netlist. AWR Netlist Files (*.net)

  • If you must save your circuit descriptions in text format, you can export and import netlists in AWR format. Otherwise this is counterproductive.

  • Instead of AWR netlists, you can easily export and import schematics, which are superior descriptions, can include much more information (for example, a default symbol and a layout), and are much easier to edit properly.

5.3.2. Importing Transistor Model Netlists and Swapping Nodes

SPICE and Spectre netlist subcircuits for transistor models usually order the nodes with the drain or collector first, and the gate or base second. Symbols in the AWR Microwave Office program order the nodes as they are in 2-port S-parameters: gate or base first, drain or collector second. (The remaining nodes, source/emitter and the optional bulk node, are in the same order.) When you import a netlist that contains a subcircuit for a transistor model, you need to reconcile this potential difference before using one of the provided symbols for that subcircuit. There are a few ways to do so:

  • As described previously, place the netlist as a subcircuit in an intermediate schematic. Attach a PORT element with parameter P=1 to the node corresponding to the gate or base, and one with P=2 to the drain or collector node (and ports 3 and 4 as appropriate). Edit the schematic options to select the desired symbol and then place the schematic as a subcircuit in schematics in which you want to use the transistor.

  • Some netlist types allow you to automatically swap the first two nodes when you import a 3- or 4-pin subcircuit netlist. If not, you can manually edit the netlist before importing to swap the first two nodes in the ".SUBCKT..." line of the SPICE netlist.

  • You can create a custom symbol for the model you are importing, with pins ordered so they match the model.

5.3.3. Importing a SPICE Netlist

Many commercial versions of SPICE exist, and some of them have custom syntax added to the standard from which they were derived (usually SPICE2G6 or SPICE3). The file extensions for commercial SPICE simulator netlists are not unique. If a netlist does not include a comment that identifies the simulator for which it is intended, you need to check the syntax for characteristics unique to each simulator to determine it.

To import a SPICE model:

  1. If the netlist does not include a subcircuit definition (.SUBCKT…), but only includes a model definition (.MODEL…), then you must either edit it to “wrap” it in a .SUBCKT, or import it using the "Circuit_Model_Parameter_Read" script.

    • To import the .MODEL using the script, ensure that there is only one .MODEL in the file. Edit the file and replace the second word after “.MODEL” with the corresponding element name in the AWR Microwave Office program. For example, if the model is a level 3 N-channel MOSFET model, and you want it to appear as a 4-pin FET in the schematic (with a visible bulk pin), then change:

      .MODEL mname NMOS (LEVEL=3 …


      .MODEL mname MOSN3_4A (LEVEL=3 …

      Then, choose Scripts > Models > Circuit_Model_Parameter_Read to run the script that reads the model.

    • To wrap the same example model in a .SUBCKT so you can import it as a netlist, edit it as follows:


      M1 D G S B mname

      .MODEL mname NMOS (LEVEL=3 …


      To access the FET width and length parameters when you place it on the schematic, edit it as follows:

      .SUBCKT MyNMOS G D S B W=1u L=0.1u

      M1 D G S B mname W=’W’ L=’L’

      .MODEL mname NMOS (LEVEL=3 …


      Ensure that the file name extension is .sp, and import it as an HSPICE file.

  2. If the netlist is a subcircuit definition intended for use with HSPICE or PSpice, ensure that the netlist file name extension is .sp or .cir, respectively, and import it. If you do not know the target simulator for the netlist, view the netlist file using a text editor and determine if the comments identify the target as HSPICE or PSpice.

  3. If the target is not HSPICE or PSpice, or if it is unknown, change the netlist file extension to .sp and import it as an HSPICE netlist file. After import, check the Status Window for messages. If the netlist format is SPICE2G6 compatible, it should import without errors.

  4. Change the file extension to .cir and import it as a PSpice netlist.

  5. Check for errors or warnings in the Status Window. If there are none, place the imported netlist in a schematic as a subcircuit, and verify the model's behavior using a simple test circuit (for example, a transistor’s IV curves or an operational amplifier’s bandwidth in a simple feedback setup). PSpice Netlist Import Details

PSpice syntax includes many extensions to SPICE2G6 that cannot be translated during import. Fortunately, most models do not include the extended PSpice syntax. The following list includes some of the most common problematic syntax along with information on how to modify the netlist so that you can import it, if possible. These are errors observed in some vendor-distributed PSpice models, and proper PSpice syntax that cannot be imported.

  • Remove extra periods (".") from command lines. (This is not standard PSpice syntax, but is used on some PSpice models distributed by vendors.)

    Original netlist:

    ..SUBCKT xx1001 10 20 30 40 50

    Fixed netlist:

    .SUBCKT xx1001 10 20 30 40 50
  • Look for comments that do not have an asterisk ("*"), the standard SPICE comment symbol, as the first character in the line. PSpice also uses the semicolon (";") to mark the rest of the line as a comment.

    Original netlist:

    * xx1001 SPICE Macro-model rev A; 01/01/01

    Copyright 2002 by Company XYZ, Inc.

    .SUBCKT ABC 1 2 3 This is a comment

    Fixed netlist:

    * xx1001 SPICE Macro-model rev A; 01/01/01

    * Copyright 2002 by Company XYZ, Inc.

    .SUBCKT ABC 1 2 3 ; This is a comment
  • Resistors, capacitors, and inductors with .MODEL statements may not translate properly. Remove the model name from the element instance, multiply the value in the instance by the R, C, or L parameter value specified in the .MODEL statement (default is 1), and comment out the .MODEL statement.

    Original netlist:

    Rxx 1 2 rmodel 10

    Cxx 2 3 cmodel 2p

    Lxx 3 4 lmodel 30

    .MODEL rmodel RES (T_ABS=-273)

    .MODEL cmodel CAP (C=10 …)

    .MODEL lmodel IND (L=1n …)

    Fixed netlist:

    Rxx 1 2 10 ; R was not in .MODEL, and defaults to 1

    Cxx 2 3 20p

    Lxx 3 4 30n

    *.MODEL rmodel RES (T_ABS=-273)

    *.MODEL cmodel CAP (C=10 …)

    *.MODEL lmodel IND (L=1n …)

  • PSpice has a voltage-controlled switch (S element, VSWITCH model) that you cannot import into the AWR Design Environment platform. For alternatives, contact Technical Support for AWR Products.

    Original netlist:

    SS1 1 2 3 4 smodel

    .MODEL smodel VSWITCH(Voff=0 Von=1 Roff=1e7 Ron=1e-3)
  • Controlled sources (E and G elements) with VALUE, TABLE, LAPLACE, FREQ, or CHEBYSHEV keywords. These elements implement the extensive PSpice analog behavioral modeling capabilities, and you cannot import them directly. PSpice and Berkeley SPICE MOSFET Model Level 3

This MOSFET model dates back to the old SPICE2G6 from U.C. Berkeley. The default values for some of its parameters are not the same in the AWR Microwave Office program (or HSPICE) as they are in Berkeley SPICE or PSpice. This is not a problem when the model parameter values are specified; however, SPICE "macro-models" (subcircuit netlists) often include near ideal models with very few of their parameters specified, and the rest left as default. Unfortunately, the intended SPICE simulator cannot be automatically identified. Before you import a SPICE netlist that is intended for use in PSpice or other Berkeley SPICE-compatible simulator, check the netlist for NMOS or PMOS models with the parameter setting LEVEL=3.

.MODEL mname NMOS(... LEVEL=3...)


.MODEL mname PMOS(... LEVEL=3...)

Check each you find for the following parameters, and follow the instructions:

  • U0: If not specified, set U0=600.

  • GAMMA: If not specified, set GAMMA=0.002 (small, non-zero value).

  • NSUB: If not specified, set KAPPA=0 (this is not an error, do not set NSUB).

  • PHI: If not specified, set PHI=0.6V.

  • CJ: If not specified, set CJ=0.

  • LD: If not specified, set LD=0.

  • ETA: If specified and non-zero, multiply the value of ETA by 815/814.

  • XJ: If specified and non-zero, XJ should never be smaller than 0.05um.

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