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Chapter 4. Layout Configuration

4.1. Setting Layout Options

Before beginning layout work, you should read this entire chapter to potentially save time and troubles at the end of your design cycle.

4.1.1. Orthogonal vs Non-Orthogonal Design Styles

Before you design, you should decide whether to use an orthogonal or non-orthogonal design style. With an orthogonal design style, all of the connection locations (called faces) between different layout items can only be rotated 0-, 90-, 180-, or 270-degrees. For example, the following figure shows a simple design that is orthogonal.

Notice that the shapes can be at any angle, but the faces (the locations highlighted in red) must be at an orthogonal angles. The following figure shows a simple non-orthogonal design.

Notice that the face highlighted in red is at a non-orthogonal angle.

This is important because when there are non-orthogonal rotations, it is impossible to represent each vertex of the shapes exactly as 1nm values (the minimum resolution in the drawing system). For example, this 100um rectangle is rotated by 31-degrees.

The upper right vertices have decimal places that must be rounded at some point, and if all of the rounding is not the same, it is possible to have gaps in the layout.

4.1.2. Grid Options

Most of the options for the Layout View Editor and the Artwork Cell Editor are set by choosing Options > Layout Options (or double-clicking Layout Options in the top window of the Layout Manager). See “Layout Options Dialog Box: Layout Tab ” for details on this dialog box.

Before beginning a project with layout, it is important to set up the resolution of the drawing database. After selecting the Grid to modify, click the Edit Grid button to access the options for Database Size and Grid Spacing.

Database Size sets the precision of the coordinates of the shapes within the layout system. The smallest resolution of the layout system is one nanometer (1e-9 meters). The specified database unit size must be a multiple of a nanometer. If you use English units (mils), the smallest database resolution that you can specify is 0.005 mils (equal to 127 nm), so the database resolution must be an integer multiple of 0.005 mils. If you use units smaller than 0.005 mils there are significant rounding errors in the generated shapes.

AWR recommends that for processes that do not have a vertex grid requirement, set the database unit size to the smallest possible, 1e-9 meters (or equivalent in your project units if using um or mm) or 0.005 mils. Typically PCB and other "larger scale" manufacturing technologies do not have vertex grid requirements. Many IC fabrication processes do have vertex grid requirements. Note that PDKs configured for the AWR Design Environment software should come with the database unit size set to the proper vertex grid requirement required by the fabrication process. However, AWR recommends that you always double check this value with your design manufacturer.

Grid Spacing specifies the drawing grid snap. The drawing grid snap simplifies the placement and construction of shapes within the layout system. In addition to being able to specify the grid spacing from the Layout Options dialog box, the toolbar for the Layout View Editor and the Artwork Cell Editor includes a tool for setting the grid snap multiplier as shown in the following figure. The multiple ranges from 0.5x to 10x. For example, if the grid spacing is set to 1 um and a multiple of 4x is chosen, the grid snap points are spaced 4 um apart.

Rotation snap angle specifies the number of discrete angles allowed during the rotation of a shape in the layout system. The allowable values range from 0.1-degrees to 90-degrees. It is also used for some of the drawing cells. For example, the MTRACE element can have angled sections, but the angles of these sections must conform to the rotation snap.

4.1.3. Layout Cell Snap Options

The Snap together option determines when the AWR Design Environment software snaps layouts together. Auto Snap on Parameter Changes automatically snaps whenever any element parameter is changed for that level of hierarchy only. Choose Edit > Snap Objects > Snap All Hierarchy to snap the entire hierarchy. This option is useful for simple layouts. For more complex layouts, especially with closed loops, this setting can cause layouts to snap more often than you want.

Manual snap for selected objects only only attempts to snap together selected items when you choose Edit > Snap Objects > Snap Together or click the Snap Together button on the toolbar. The first item you select is the item that does not move unless one of the other items is anchored. For hierarchy, if you select items including subcircuits, and choose Edit > Snap Objects > Snap All Hierarchy, all the items including hierarchy are snapped together.

Manual snap for all objects is identical to Manual snap for selected objects only except you do not have to select items and all items are snapped.

NOTE: You can set default snap options at the environment options level (see “Environment Options Dialog Box: Layout Tab ”) to apply the setting to all of your projects, or at the project level (see “Layout Options Dialog Box: Layout Tab ”) to apply the settings only to the current project.

Face inset options are selected from the Auto face inset list in the Layout Cell Snap Options area of the Layout Options dialog box Layout tab. The following options are available:

  • Do not inset faces: Turns off the automatic face insetting so no artificial overlap is created for any of the layout cells.

  • Inset non-orthog. X.X db units: This is the default option (with X.X = 0.5). This option insets any faces that are not orthogonal. The default insets an angled face by 0.5 database units to ensure that any connecting shapes are still connected after the shape is created on the database grid.

  • Inset all X.X db units: Insets all faces (including orthogonal faces) by a multiple of the database unit. This is the recommended setting for non-orthogonal designs.

For non-orthogonal designs, these settings help avoid gaps in layout. Although the DRC (if it is set up to do so) can catch cell connection gaps like those described in “Diagnosing Layout Problems ”, it is often desirable to have a mechanism to avoid these potential gaps. The mechanism that is provided allows you to select an option that causes the connection faces to be inset automatically so there is some built-in overlap at the connection points.

AWR recommends always using Keep origin on grid. This is the default for new projects and it cannot be turned off once it is turned on. This option exists to allow customers with pre-v9.0 designs to make this change and see what the affect is on their layout. Layouts change when you select this setting, so you should save a backup.

You should select Allow pCell's origin to float for non-orthogonal designs to allow rotated pCells to properly snap together.

4.1.4. Preventing Layout Problems

The following sections describe potential layout problems and their solutions.

Subcircuits and Artwork Cells Must be Orthogonal

Subcircuits and any layout item using an artwork cell as the layout should never be rotated non-orthogonally, or you can end up with gaps in the layout and/or items that cannot be snapped together. Only pCells can be non-orthogonal. For example, in the following figure the layout uses one pCell (layout for a MLIN element) and one artwork cell and they are rotated by 45-degrees with a very large database grid size (1um) to demonstrate what can occur.

pCell Rounding

pCells always round to 2x the database grid size so the centers of each face can still be drawn on the database grid. For example, with a 1um grid and a 5um wide line, the center is 2.5um which cannot be drawn on the grid, as shown in the following figure.

The database grid size is 1um, the left shape is 6um wide and the right shape is 5um wide. The 5um wide line was rounded down to 4um. This example uses an unrealistically large database grid size to demonstrate this issue.

Path Vertices on Grid

Paths are drawing objects with user-specified centerline, width, and corner miter type. Alternatively, many of the pCells in the AWR Design Environment suite draw as paths, such as TRACE elements and inductors. These can lead to situations where the vertices stored are on grid, but the outline of the shape is not. If your vertices must be on grid, you can force paths to draw and export this way. Choose Options > Layout Options and click the Paths tab. In Draw as polygons, you can set the path to always draw as polygons or only when vertices are off grid. The advantage is that you are guaranteed to have shapes on grid. The disadvantage is that the shape is no longer a path when it is exported from the AWR Design Environment software, which might make editing the exported artwork file more difficult. For example, a 40um MTRACE2 element has been routed at non-orthogonal angles with a 1um database grid size. The following figure magnifies one of the vertices of this path.

Notice the vertex circled in red is not on the grid drawn on the layout. With Draw as polygons set to Always or When vertices are off-grid, this layout displays like the following figure.

Now the highlighted vertex is exactly on grid.

Different Length Faces

Rotated items with faces that have different lengths cause gaps in layout. This is due to the way vertices get rounded. For example, the following figure magnifies a 40um line connected to a 10um line with a 1um database grid size.

Note the rather large gap between the shapes, but no rat line. There are several solutions to this problem. The first is to use a cell between them that has the same face lengths. For example, for two MLIN elements with these dimensions, an MSTEP should be used between the two lines. This produces a more accurate simulation result and better layout. With the MSTEP included the layout displays as follows.

The other option is to inset non-orthogonal faces, as discussed in the following sections. If you do this, the layout displays as follows.

Artwork Cells with Odd Multiples of the Grid

Artwork cells that draw faces that are odd multiples of the database unit size can have problems snapping together since the center of the face is off grid. For example, see the following layout where a pCell is connected to an artwork cell with a 5um face length and a 1um database resolution.

The software cannot snap these cells together with default settings; the red circle highlights the ratline. The solution is to either change the size of the face drawing or change the database resolution size to half of the current setting or lower.

You can also use the Allow pCell's origin to float option.

Snapping vs Dragging

In a layout, there is a difference between manually dragging shapes and snapping them together. This is more common with non-orthogonal designs or when faces on artwork cells are an odd multiple of the database resolution size. Moving shapes only moves them to align the edges of the shapes, but not the center of the faces. Snapping aligns the center of the faces.

4.1.5. Diagnosing Layout Problems

Since a layout must be drawn to a finite integer grid, there are often round-off related issues related to how the cells snap together. These round-off related problems are usually associated with non-orthogonal geometry. For example, in the following figure, if the grid dots represent the database unit size, it is not possible to rotate the rectangle without distorting the shape. The true rotated shape is shown with a solid line, and the distorted snapped shape is drawn with a dashed line.

There are other problems with angled geometry regarding how the layout cell objects connect together at their faces. In the following figure, there are two rotated rectangles that should be connected together. The solid line shows where the rectangles should draw, and the dashed line shows where the rectangles must draw when they are snapped to the grid. The grid snap operation snaps each off-grid point to the nearest grid point. As shown in the following figure, the snapped versions of the shape are no longer connected at all and there is a small gap between the two rectangles.

There are options you can set in the Drawing options section of the Layout Editor Mode Settings dialog box related to the layout cell faces to help diagnose specific problems. See “Layout Editor Mode Settings Dialog Box ” for a description of this dialog box. Draw origin markers draws an "+" symbol at the origin of each layout object, and Draw cell faces draws a line along the length of each cell face and a smaller perpendicular line at the face center.

For example, cells that are not connected properly when dragged instead of snapped are easily diagnosed by viewing these items. The following figure demonstrates this; the red circle shows the rat line in the layout.

If you look closely, you can see that the face center markers are not aligned. When this problem is fixed, however, you can see that the face centers are at the same location.

In complex designs, it may be difficult to find locations where the layout does not snap together. The integrated Design Rule Checker (DRC) tool in the AWR Design Environment software is helpful in locating ratlines. See “Design Rule Checking (DRC) ” for details on the AWR DRC tool. Specifically, the rat line check helps you find any rat lines in your design. You must have a feature that has DRC enabled to use this tool. To perform this specific check:

  1. Make your top level layout the active window and choose Verify > Design Rule Check.

  2. In the displayed dialog box, click the Uncheck All button.

  3. Click the Run Rat Line Check button.

  4. Click the Run DRC button.

  5. The Design rule violations window displays to show any rat lines left in the design.

4.2. Configuring Layout Mode Properties

You can set various layout modes, each with different layout option configurations to control the properties such as display of layers, instances, text, iNets and hierarchical viewing; and for layout works such as placement, routing, and custom work. You can easily switch between layout modes by clicking on the layout mode name.

For example, while routing iNets you may be required to dim the colors for artwork cells and subcircuits, restrict the selection of all the items except for flylines, show only the outlines of layout shapes, and display only a few levels of hierarchy; but for placement, you may need to display the entire hierarchy, restrict the selection of flylines, show the entire detail of layout, and not dim the colors. You can easily configure this using Layout Mode Properties.

To define a mode, choose Layout > Layout Mode Manager with a layout window active.

In the Layout Mode Properties dialog box, click Add to create a new Normal, View Only, or Routing Layout mode.

Enter the Mode name in the Layout Editor Mode Settings dialog box and set the desired properties.

You can access all of the modes and their properties by choosing Layout > Layout Mode Properties. All of the defined modes are displayed in separate tabs. While working in layout, you can execute each mode's properties by choosing the mode name from the drop-down list in the toolbar.

See “Layout Editor Mode Settings Dialog Box ” for a description of each option.

NOTE: You need to set the layout mode properties carefully and select the proper mode, otherwise working in the layout window can be confusing.

4.3. Drawing Layers and Model Layer Mapping

The layout tool in AWR Microwave Office software has a powerful system for handling multiple-layer layouts that are commonly used for the physical design of RF and microwave circuits. The model layers are then mapped to drawing layers. You can define the drawing layers and how the drawing layers are mapped to each model layer. Note that each model layer must have one drawing layer in the mapping, but any number of model layers can be mapped to the same drawing layer. Two separate, unique layer lists are managed in the program. This allows the layout system to be very flexible for bringing together layout objects (for example, parameterized artwork and GDSII artwork cells) from many different sources. Drawing layers are used for display and for exporting purposes of layouts. Model layers are used to store information for parameterized cells and artwork cells. You can also specify many different layer mapping schemes. When editing an artwork cell, the layer of the cell is shown on the model layers. When a layout is created from the schematic, the layer is shown on the drawing layers.

Drawing layers are defined in the General section of the Drawing Layer Options dialog box accessible by choosing Options > Drawing Layers. The Drawing Layer 2d section defines all of the drawing layers that are used in schematic Layout View and the Drawing Layer 3d section defines the 3D properties of drawing layers so you can view the layout in 3D. If the 3D properties are not defined for a drawing layer, the layer is not displayed in a 3D view of the layout.

For example, in the following figure resistors are created on two different layers in a dielectric stack. The artwork for the resistors is imported into AWR Microwave Office software in a GDSII library, and the artwork is stored on model layers that correspond to the GDSII layers in the GDSII library. To simplify, if the resistor is on a single layer and is originally on layer 9 with object type 0 in the GDSII file, the resistor artwork is stored on the model layer "9_0." The model naming convention is discussed in “Model Layer Conventions”. The designer is using a process that has two levels for circuit components and has set up two drawing layers, "resistor_level_1" and "resistor_level_2" to draw the resistor on the different layers. Two mapping tables are also set up, one called "level1" with model layer "9_0" mapped to drawing layer "resistor_level_1", and a second called "level2" with model layer "9_0" mapped to drawing layer "resistor_level_2", as shown in the following figures. The designer can now create a schematic with two resistors, one for layer 1 and one for layer 2.

You must modify the layout property for each resistor to be the artwork cell that was imported in the GDSII library. This is discussed in “Assigning Artwork Cells to Layout of Schematic Elements”. Next you create the layout from the library from the Schematic View and assign the proper layer mapping to the two types of resistors. To do so, select the resistor object in the layout and open the Cell Options dialog box, then select the cell options and change the Layer Mapping to "level1" for the resistor to be drawn on Level 1 and "level2" for the resistor to be drawn on Level 2. Finally, the resistors display in the Layout View on two different drawing layers even though they were brought into the project as a single artwork cell.

Model layers and drawing layers are specified by a name given to the layer (a text string). Commonly, model layers map to drawing layers of the same name (unity mapping) for simplicity. The ability to map model layers to arbitrary drawing layers is useful in some situations.

The layout cells used in the layout can be artwork cells that are stored as instances within a GDSII library. If layout cells from multiple GDSII libraries are used in a project, and the layers defined in the two libraries are not consistent, then the layer mapping provides a clean mechanism for mapping the layers from the different libraries (the layer definitions in the GDSII file are treated as model layers by the artwork cells) to a consistent set of drawing layers.

GDSII-based layout cells draw to model layers that are based on the GDSII layer number and the GDSII object type. For example, a shape drawn on GDSII layer 6 with an object type of 0 would draw on model layer "6_0" (the object type is usually 0 for most GDSII libraries). The layer mapping allows the less descriptive model layer (for example, "6_0") to be drawn using a more descriptive drawing layer name (for example, "Metal1").

You can program parameterized layout cells to use "hard coded" layer names. For instance, you can code a parameterized layout cell that draws a transmission line to draw the shape for the transmission line on a model layer named "Metal1". A parameterized layout cell coded by someone else for a discontinuity element could draw on a model layer named "Trace1". If both layout cells are needed within a single project (and they need to draw on the same drawing layer named "Metal1"), the mapping can be set up so that model layer "Metal1" is mapped to drawing layer "Metal1" (unity mapping) and model layer "Trace1" is also mapped to drawing layer "Metal1." When the Layout View of a schematic using both types of parameterized cells is opened, both cells are drawn on the same drawing layers.

For complex, multi-layered boards (such as an LTCC module) you may want to have a given layout cell draw onto different drawing layers. For example, a layout cell for a buried resistor may be the same for resistors that are sandwiched between different layers of the physical board. By creating additional mapping tables, the buried resistor can always draw on the same model layers while being mapped to the actual drawing layer that is appropriate for the resistor given its location in the physical layer stack, as shown in the following figure.

4.3.1. Layer Mapping of Layout Cells

Mapping of the model layers to the drawing layers for a layout cell is shown in the following figure.

4.3.2. Model Layer Conventions

The naming of the model layers used by the layout cells depends on the type of layout cell. There are three different types of layout cells that have different mechanisms for naming the model layers.

For parameterized cells that are implemented by coding in the parameterized drawing of the layout cell, there are two methods for naming the model layer. Each method has advantages and disadvantages and it may be appropriate to use both methods in a given layout cell definition.

The simplest method for naming the model layers within the layout cell is to "hard code" the model layer name into the cell definition. For example, an MS Line can be coded to always draw to the "Thick Metal" model layer. This method works best when a naming convention is established so that different layout cells that need to draw on the same drawing layers use the same set of model layers. This is not strictly required because it is always possible to map incompatible model layers to any set of drawing layers. In general, it is not convenient to have to set different mappings for a large number of different layout cells, so having a naming convention simplifies the use of the layout cells.

The second method for naming the model layers within a parameterized cell definition is to use model layer names that are configured using the Process Definition File (LPF file). This method is more flexible, and it is also the method used by most of the built-in cells that are included with AWR Microwave Office software. The LPF file defines line types, which include the names of the model layers used to draw the line types. Layout cells that use configured layers can easily be transferred from one process to another by reading in a different LPF file that is configured for the process. In addition to providing model layer names, the line type definitions in the LPF file allow multi-layer line types to be defined. See “Line Type ” for more information. Note that the layer names defined in the LPF file are model layer names and not drawing layer names, although it is common to use the same names for both with a unity mapping from the model layers to the drawing layers.

Another method for naming model layers applies to the GDSII-based artwork cells. These cells use model names derived from the GDSII layer number and object type. For example, a GDSII shape that draws on layer 4 with an object type of 0 draws to model layer "4_0". See “GDSII Layer Mapping” for a more detailed description of GDSII model naming conventions.

4.3.3. Creating the Layer Mapping

You can create or edit one or more layer mapping tables for a project from within the Drawing Layer Options dialog box, or you can initialize them from an *.LPF file. The following figure shows the Model Layer Mappings window of the Drawing Layer Options dialog box.

You can create a new mapping table by right-clicking Model Layer Mappings and choosing New Model Layer Mapping. When you create a new mapping you must provide a name to identify the mapping. You can also copy or delete mapping tables from the Drawing Layer Options dialog box. Click New Layer to add a new model layer to the mapping table. To edit the model layer, simply click and edit. Click Delete to delete model layers from the table. Click the drawing layer to the right of a model layer to view a drop-down list of drawing layers to which you can map a model layer.

Note that the model layers in a project are common to all model layer mappings. When you create a new mapping, all the existing model layers are automatically included. If, while editing one mapping, you create a new model layer or delete an existing model layer, that change is made in all model layer mappings. You can create different drawing layer assignments in each mapping, however, and that change is not synchronized to the other mappings. This is how you create separate mappings from the same model layer names to different drawing layers. This is useful, for example, when you import cell libraries from different sources whose layer naming or numbering conventions conflict with one another.

GDSII Layer Mapping

You can use GDSII cells for defining layout cells, or you can add them to the layout as drawing shapes that are not associated with any circuit components in the schematic. The GDSII instances that are used for layout cells (or used as non-associated shapes) can contain unlimited levels of hierarchy within the cells. For example, a GDSII cell of a FET may contain sub-cells for the gate fingers. When a hierarchical cell is used, all cells within the hierarchy need to be loaded into the project.

GDSII Layer Conventions

The polygons within a GDSII file are on layers defined by a drawing layer number and an object type. The layer number and the object type combine to define a unique layer number. The actual layer number is formed by using the GDSII layer number for the low order byte and the object type for the high order byte. In the original GDSII specification, only 64 layers were allowed. The data size used to store the layer number within the GDSII file allows for up to 256 layers. Most modern software that supports GDSII allows the full range of 256 layers to be used. When combined with 256 possible object types, the total number of possible unique layers is 65,536. The object type is usually zero for most GDSII libraries, so typical GDSII files usually have less than 256 unique layers.

AWR Microwave Office software works with named layers (as opposed to the numbered layers used by GDSII). When a GDSII file is read into AWR Microwave Office software, the numbered layers are automatically assigned to named model layers. The model layer names are of the form "LayerNumber_ObjectType". For example, a shape on layer 8 with an object type of 0 is associated with a model layer named "8_0". The generated GDSII model layers are typically mapped to more descriptive drawing layer names.

GDSII Layout Cells

GDSII cells used as layout cells need to have "faces" added to them to define how they should connect to other layout cells. You can easily add a "face" to any GDSII cell by drawing the face onto the cell in the GDSII Cell Editor. You can save GDSII cells that have faces added as native GDSII files. The faces that are drawn onto the cell are drawn as GDSII path objects with a layer number of 99 and an object type equal to the node number to which the face corresponds. Since all the information about the faces are stored as standard GDSII constructs, the GDSII layout cells can be read into and modified by any tool that handles GDSII. The use of standard GDSII constructs also makes it possible to create GDSII-based layout cells (with faces) in other tools that allow specification of the layer numbers and object types.

Importing GDSII Libraries

When importing a GDSII library from the Layout Manager, it is very important that there are layer mappings from the GDSII layers to the drawing layers. This requires that there be a model layer for each GDSII layer. For example, if there are only two layers in the GDSII file (layer 2 and layer 8), then there needs to be two model layers in the mapping table for layers 2_0 and 8_0 (see the previous discussion on GDSII layer naming conventions). You should then map the 2_0 and 8_0 model layers to the desired drawing layers.

Often, you do not know what GDSII layers are in a GDSII artwork library before they are imported. This is especially true when using XML libraries for vendor parts, since the vendors usually create the artwork representations that the software automatically imports. If there is no GDSII model layer defined for the GDSII layer being imported, the program automatically generates the new model layer. At this point, the program does not know what drawing layer to use for the new model layer, so it automatically creates a new drawing layer with the same name as the drawing layer and uses unity mapping (the same drawing and model layer name).

It is good practice in layout to have a list of drawing layers defined for the process you are using. If you see any new layers added to the drawing layer list (the most obvious are GDSII formatted layers, for example, "6_0"), you should map these model layers to one of your pre-defined drawing layers. This may require more than one mapping table to get it correct. Once this model layer is mapped, you should delete the unwanted drawing layers from the drawing layer list.

4.4. The Layout Process File (LPF)

The Layout Process File (LPF file) allows you to configure a project for a particular manufacturing process.

With LPF Units, AWR Design Environment software supports per-process technology native units. This feature allows different designs (using different process technologies) within the same project to specify values in units most appropriate for that design process. You specify the units for each process as part of the layer process file (LPF). For example, a chip design might use units of microns for length, while the board in which the chip is mounted uses units specified in mils for lengths.

You can import an LPF file into a project at any time to facilitate moving designs from one process to another. To import an LPF file, choose Project > Process Library > Import LPF or right-click Layer Setup in the top window of the Layout Manager and choose Import Process Definition. You can also export an LPF file from an existing project by choosing Project > Process Library > Export LPF or by right-clicking the process definition object in the top window of the Layout Manger and choosing Export Process Definition. The commands available on the context menu include:

  • Properties – displays the Drawing Layer Options dialog box. You can also double-click the process definition object node to display this dialog box.

  • Text Edit Process Definition – allows you to edit the process definition in a text view. Changes take effect when you close the view, or immediately if you click the Parse button on the toolbar that is active while the text edit view is open.

  • Delete Process Definition – deletes the process definition.

  • Export Process Definition – exports the process definition to a user-specified file in text format.

  • Rename Process Definition – renames the process definition.

  • Make Default Process Definition – makes the specified process definition into the new default process.

  • Sync LPF with Stackup – displays the Update LPF from Stackup dialog box to allow you to select a STACKUP element located in a Global Definitions document and transfer the color, hatch pattern, thickness, and Z position of the EM layers into the drawing layers of the process definition.

The LPF file named default.lpf in the program directory is used as the default configuration for new projects. The contents of the default.lpf file are determined by the default unit of measure you select during installation. The contents of the MMIC.lpf file are copied to this file if you choose microns, the contents of the MIC_metric.lpf file are copied if you choose millimeters, and the contents of the MIC_english.lpf file are copied if you choose mils. To use a different LPF file for the default, you should rename that LPF file to default.lpf and place it in the program directory. Alternatively, you can use an LPF file that already exists in the project by selecting it on the Layout Options dialog box Layout tab as the Grid to modify to make it the new default LPF. You can also right-click the non-default LPF in the Project Browser and choose Make Default Process Definition.

The default LPF file is not used to configure saved projects that are read back into AWR Microwave Office software. Saved projects maintain the settings specified during their creation, and they also save any changes made after project creation. You can "update" the settings in a project by importing a newer LPF file back into the project. This file resets all settings and overwrites any previous setting changes (such as a change to a layer mapping table).

Once the process definitions are imported via layer process files (LPFs), you can begin creating designs which use these process technologies, and specifying values for structures in their native process units.

The entries in the LPF file are bracketed using the following notation:

$XXX_BEGIN
!Specific information
$XXX_END

The XXX portion is replaced with a more descriptive indication of what the information is used for. Comments can also be included in the LPF file by preceding the comment with a "!" character. There are many different components to the LPF file:

$PROCESS_SETUP_BEGIN
         :
$PROCESS_SETUP_END

PROCESS_SETUP_BEGIN and PROCESS_SETUP_END bracket the information in the LPF file that sets up information on multi-layer drawing cells, default values, units, and others. This section is one of two main sections within the LPF file. The other section is bracketed by the following:

$LAYER_SETUP_BEGIN
         :
$LAYER_SETUP_END

LAYER_SETUP_BEGIN and LAYER_SETUP_END bracket the information in the LPF file that sets up the information displayed in the Drawing Layer Options dialog box. The layer information includes all information on drawing layer properties and all the layer mapping and file mapping tables.

$EM_MAPPING_BEGIN
         :
$EM_MAPPING_END

EM_SETUP_BEGIN and EM_SETUP_END bracket the information in the LPF file that sets up the default properties of the new EM structures and the properties of the conductor types available.

NOTES:

  • All names for layers, structures, line types, bridge types, map tables, and conductors are restricted to 32 characters maximum.

  • You can configure many of the items specified in the LPF within a dialog box in the AWR Design Environment software. For those sections, the proper dialog box is referenced in the following sections.

For information about the Process Definition Wizard, see “Process Definition Wizard”.

4.4.1. The $PROCESS_SETUP_BEGIN/END Section

There are several sub-sections that you can include in this section:

Default Units

Default units are set on a per-LPF basis by choosing Options > Drawing Layers, then selecting the desired LPF from the Select LPF file dialog box. Click OK to display the LPF Options dialog box, then under the General folder in the left pane, click Units and specify the desired units.

The following shows a sample section for setting the default units with all of the possible unit types listed (length, frequency, capacitance, inductance, resistance, conductance, temperature, angle, time, voltage, current, and power).

$DEFAULT_UNITS_BEGIN
     LEN  mil
     FREQ G
     CAP  p
     IND  n
     RES  k
     COND m
     TEMP DegC
     ANG  Deg
     TIME n
     VOLT m
     CUR  m
     PWR  m
$DEFAULT_UNITS_END

The possible unit values are:

  f    femto
  p    pico
  n    nano
  u    micro
  m    mili
  c    centi
  k    kilo
  M    mega
  G    giga
  T    tera
  mil  mil (for length only)
  inch inch (for length only)
  feet feet (for length only)

Default Values

Default values are set on a per-LPF basis by choosing Options > Drawing Layers, then selecting the desired LPF from the Select LPF file dialog box. Click OK to display the LPF Options dialog box, then under the General folder in the left pane, click Default Values and specify the desired values.

The following is a sample section for setting the default values for new circuit elements that are added to the project, with all of the possible unit types listed. The unit modifiers that can be applied to the entry in the LPF file are the same as the unit modifiers used for the default units previously described.

$DEFAULT_VALUES_BEGIN
     W     40   u
     L     100  u
     H     50   u
     T     2    u
     Er    12.9
     Rho   1
     C     1    p
     Li    1    n
     Rad   50   u
     M     0.6
$DEFAULT_VALUES_END

Drawing Resolution Settings

Database size and grid spacing settings are set on a per-LPF basis by choosing Options > Drawing Layers, then selecting the desired LPF from the Select LPF file dialog box. Click OK to display the LPF Options dialog box, then under the General folder in the left pane, click Grids and specify the desired values.

The following section is used to specify the database resolution and the grid spacing used for the visual grid. The layout system stores shapes in integer nanometers, so the smallest possible drawing resolution is 1 nanometer. If the drawing is in English units, then the drawing resolution needs to be representable by an even number of nanometers. For layouts specified using mils, this implies that the smallest possible drawing resolution is 0.005 mils (127 nanometers).

$DBASE_UNIT_BEGIN
    DRAW_RESOLUTION   .01 u
    GRID_SPACING        1 u
$DBASE_UNIT_END

Line Type Definitions

These settings must be specified in the LPF file using a text editor. Export your LPF, edit the LPF and then import the file back into your project.

A line type describes the layers used for a single transmission line. For example, a plated metal line that requires two metal layers and an etch layer can be configured as a line type in the LPF file. The following shows an LPF entry for a single line type (there is an entry like this for each line type).

$LINE_TYPE_BEGIN "PlatedLine"
            !Name is to identify the line, 32 characters maximum
            !Layer     Layer_offset	   minWidth  	  flags
            "Metal1"   0                2e-60         0
            "Via2"     -0.5e-6          3e-60         0
            "Metal2"   0.5e-6           2e-60         0
$LINE_TYPE_END

Layer is the name of the model layer. Layer_offset is the offset used for drawing the layer as shown previously. The minWidth number is used for checking design rule violations. Flags can be used to pass specialized information to the layout cells.

Process Development Kit Line Types List

The Process Development Kit Line Type List block provides a listing of the line names from the LPF file the PDK uses, in the order in which the PDK expects the line types to appear.

A block of this type is required to maintain correct Via and Bridge connections in layouts if line types are added, deleted, or re-ordered without updating the PDK kit. You can change line types if there is a PDK line types block describing which line types the PDK uses, and their order.

This block is normally added by PDK Kit developers to indicate the line types and their order of use by the kit at the time of development. The block should only be updated by PDK developers when they update the kit to use a different set or order of line types. This block should not be changed unless the PDK kit is changed accordingly.

The block itself is a simple list of the names of each line type the kit uses, between a block begin and end statement as follows.

$PDK_LINE_TYPES_BEGIN
        ! Line Types in order expected by PDK, modify only if PDK is updated.
        "Thick Metal Line"
        "Plated Metal Line"
        "Cap Bottom Line"
    $PDK_LINE_TYPES_END

Each entry in the table is a name that corresponds to the name of a line type after a $LINE_TYPE_BEGIN "Line Type Name" entry in the LPF file when the LPF file is initially created. This list corresponds to a line type set as follows:

     $LINE_TYPE_BEGIN "Thick Metal Line"
         ! -> Layer offset minWidth flags
         "Thick Metal" 0 5e-06 0
     $LINE_TYPE_END

     $LINE_TYPE_BEGIN "Plated Metal Line"
         ! -> Layer offset minWidth flags
         "Cap Bottom" 0 5e-06 0
         "Thick Metal" -3e-06 5e-06 0
         "Nitride Etch" -5e-06 4e-06 0
     $LINE_TYPE_END

     $LINE_TYPE_BEGIN "Cap Bottom Line"
         ! -> Layer offset minWidth flags
         "Cap Bottom" 0 5e-06 0
     $LINE_TYPE_END

If you want to make "Cap Bottom Line" the first line type, you could modify the line types as follows:

     $LINE_TYPE_BEGIN "Cap Bottom Line"
         ! -> Layer offset minWidth flags
         "Cap Bottom" 0 5e-06 0
     $LINE_TYPE_END

     $LINE_TYPE_BEGIN "Thick Metal Line"
         ! -> Layer offset minWidth flags
         "Thick Metal" 0 5e-06 0
     $LINE_TYPE_END

     $LINE_TYPE_BEGIN "Plated Metal Line"
         ! -> Layer offset minWidth flags
         "Cap Bottom" 0 5e-06 0
         "Thick Metal" -3e-06 5e-06 0
         "Nitride Etch" -5e-06 4e-06 0
     $LINE_TYPE_END

You would not change the PDK line type list because it needs to reflect the order when the PDK was developed:

$PDK_LINE_TYPES_BEGIN
        ! Line Types in order expected by PDK, modify only if PDK is updated.
        "Thick Metal Line"
        "Plated Metal Line"
        "Cap Bottom Line"
    $PDK_LINE_TYPES_END

In this example the list remains the same as the original, so the PDK knows the original order for the line types when the kit was developed.

With the PDK line types block defined in the LPF you can add, delete, or reorder line type entries and still get correct connections in the existing layout design documents.

Structure Type Definitions

These settings must be specified in the LPF file using a text editor. Export your LPF, edit the LPF and then import the file back into your project.

A structure type describes the layers used for a structure that can be defined in a parameterized layout cell. This allows the same type of information that is used to draw line types to be passed to user-defined layout cells to allow the creation of user-defined configurable cells. The name given by the structure can be used to access the information in the structure from the layout cell drawing code, and it cannot exceed 32 characters in length.

$STRUCT_TYPE_BEGIN "Resistor"
    !layer                   offset       min width   flags
    "Res"                    -2e-6        4e-6         1
    "Thick Metal"            0            5e-6         0
    $STRUCT_TYPE_END

Only a small number of elements use cells that reference structures, including:

Capacitor Definitions

These settings must be specified in the LPF file using a text editor. Export your LPF, edit the LPF and then import the file back into your project.

The capacitor definition describes the layers used for the built-in thin film capacitor layout cells. The first layer in the definition needs to be the bottom plate of the capacitor.

$CAP_DEFINE_BEGIN
    !layer              offset       min width       flags
    "Metal2"            2e-6         5e-6             0
    "Metal Top"         0	           4e-6             0
    "Thick Metal"       -2e-6        4e-6             0
$CAP_DEFINE_END

PAD Definitions

These settings must be specified in the LPF file using a text editor. Export your LPF, edit the LPF and then import the file back into your project.

The PAD definition constructs PADS for specific processes (RPCB, MMIC, RPIC) based upon the layering scheme.

$PAD_DEFINE_BEGIN
    !Layer                   offset         minWidth    flags
    "Source Drain"           0     	         e-06        0
    "Cap bottom"             -2e-06          5e-06       0
    "Thick Metal"            -5e-06          5e-06       0
    "Nitride Etch"           -7e-06          4e-06       0
$PAD_DEFINE_END

Via Definitions

These settings must be specified in the LPF file using a text editor. Export your LPF, edit the LPF and then import the file back into your project.

The via definition describes the layers used for the built-in via layout cell. The following figure shows an example of a via layout cell. The via cell is sized from the element parameter named "D" (the diameter).

The following LPF file entry was used to generate the layout shown in the previous figure. There are three defined layers in the entry. Each of these layers causes a shape to be drawn on the specified layer for the via. The offset value for each layer defines the size of the shape. For example, if a circle is drawn, the radius of the circle is D/2+offset. A negative offset then makes a smaller circle. The flags value determines the type of shape that is drawn. A drawn shape can be a square (with or without mitered corners) or a circle. The flags are also used to specify where on the via the connection face should be located. By default, the connection face is located at the center of the via (there are also alternative faces that allow connection to the via from any of the four different orthogonal directions). There are four possible values for Flags. If the value is 1 or 3 (1st bit set), then the drawn shape is a circle; if it is 0 or 2 (1st bit clear), it is a square. A value of 2 or 3 (second bit set) causes the outer perimeter of the drawn shape to be used as the reference plane for drawing the connection face. Only one (at most) of the defined layers should have a flag value of 2 or 3. If none of the defined layers has a value of 2 or 3, then the connection face is drawn at the center of the via. The miter parameter is only used when a square is drawn. A non-zero value for the miter causes the corners of the square to be mitered as shown previously.

$VIA_DEFINE_BEGIN
    !Layer       	           offset  	      miter       flags
    "First Metal"            0               0           0
    "Source Metal"           -2e-06          5e-06  	    0
    "Via Etch"               -7e-06	         0           1
$VIA_DEFINE_END

You can use process defaults or presets for the Via Fill command in the Via Fill dialog box by including the following LPF file entry:

!--- Via Fill Entries Process Presets ----
$VIA_FILL_ENTRIES_BEGIN

    <Entry Name> <Lib Name> <Cell Name> <Spacing Type> <Spacing X> <Spacing Y> <Offset X> <Offset Y> <Clearance> <Stagger>

$VIA_FILL_ENTRIES_END

You can use process defaults or presets for the Via Fence command in the Via Fence dialog box by including the following LPF file entry:

!--- Via Fence Entries Process Presets ----
$VIA_FENCE_ENTRIES_BEGIN

    <Entry Name> <Lib Name> <Cell Name> Spacing Type> <Spacing> <Offset X> <Offset Y> <Merge Perimeters> <Perimeter Oversize> <Open Ends>

$VIA_FENCE_ENTRIES_END

pCell Multi-layer Line Drawing

When using LPF’s with multi-layer LineTypes, some pCells (particularly those with curves or arcs such as MCURVE, MRSTUB, or MRINDSBR) are likely to have DRC errors. These errors most often occur when one layer should be drawn with a minimum inset to another layer. Because the points along the curve are snapped to the layout grid, some of them are slightly less than the required inset distance.

For example, a LineType has three drawing layers, METAL1 and METAL2 drawn with 0 offset, and VIA2, which is required to be inset by 1um. Because of grid rounding, VIA2 gets too close to METAL1 and METAL2 in some places, as shown in the following figure.

The result is a DRC error such as: 'Minimum extension' violation from VIA2 to METAL1 {EXTENSION "VIA2" "METAL1" 1000 } (< 1um).

pCells with curves check the LPF for process variables in a “name value” format that tells them to draw the inset layers (VIA2 in this case) with extra inset to prevent this DRC error. You should include the variables in the $PROPERTY_VALUES_BEGIN/_END section of the LPF:

$PROPERTY_VALUES_BEGIN
        EXTRA_OFFSET_ON_CURVES 1
        XTRA_CURVE_OFFS_LT0_LN1 -.2e-6
$PROPERTY_VALUES_END

Setting the 'EXTRA_OFFSET_ON_CURVES' variable to 1 indicates that the pCell should check each layer to see if an additional inset is supplied. You can specify additional offset amounts for specific layers in each LineType with a variable of the form:

XTRA_CURVE_OFFS_LT<x>_LN<y> <offsetAmount>

where <x> is the LineType index (starting from 0), <y> is the drawing layer index in the LineType (starting from 0), and <offsetAmount> is the additional offset distance. In the previous example, the second variable, 'XTRA_CURVE_OFFS_LT0_LN1 -.2e-6', indicates that the 2nd drawing layer (index 1) of the first LineType (index 0) should be inset by an additional 0.2um on curved pCells. If this layer normally has a -1um inset in LineType 0, then on curved pCells it has an inset of -1.2um.

Airbridge Drawing Object Selection

These settings must be specified in the LPF file using a text editor. Export your LPF, edit the LPF and then import the file back into your project.

The following selects which airbridge drawing object is used to draw the airbridges specified by the layout cells. The name specified must match the name assigned to the airbridge drawing object in its implementation, and it cannot exceed 32 characters in length.

$BRIDGE_DRAW_BEGIN MyLayoutType $BRIDGE_DRAW_END

DRC Rules File

These settings must be specified in the LPF file using a text editor. Export your LPF, edit the LPF and then import the file back into your project.

The rules file that the DRC uses can be configured from the LPF file as follows. You can also import DRC files directly into the DRC editor using any valid file path to specify the rules file. The $MWO identifier is automatically replaced with the AWR Microwave Office installation directory.

$DRC_RULES_FILE_BEGIN
"$MWO\drc_rules.txt" $DRC_RULES_FILE_END

Connectivity Rules

These settings must be specified in the LPF file using a text editor. Export your LPF, edit the LPF and then import the file back into your project.

The connectivity rules define how layers are physically connected. There are several types of rules to properly define connectivity for all processes. The following section provides an example of these rules. For details on all of the rules available, see “Connectivity Rules” for details.

$CONNECT_RULES_BEGIN 
		Connect "Gate Metal" To "Metal 1"
		Connect "Source Drain Metal" To "Metal 1"
		Connect "Ground Via" To "Metal 1"
		Connect "Metal 1" To "Metal 2" By "Dielectric Via"
$CONNECT_RULES_END 

Default Layout Font

You can set these values directly in the program by choosing Options > Layout Options and clicking the Layout Font tab. See “Layout Options Dialog Box: Layout Font Tab ” for details.

You can specify in the LPF the default font used for layout text as follows. The first item in the specification is the font name, which can be any installed Windows True Type font. The second item is the height of the font in integer nanometers. The third number is 1 if the font is a bold font and 0 otherwise. The fourth number is 1 if the font is italic and 0 otherwise.

$DEFAULT_FONT_BEGIN "Arial"
	100000	0	0 	$DEFAULT_FONT_END

4.4.2. The $LAYER_SETUP_BEGIN/END Section

There are several subsections that can be included in this section. The properties in this part of the LPF are most easily configured by setting the desired options in the Drawing Layer Options dialog box and then exporting an LPF file from the project. Layer names cannot exceed 32 characters in length.

Drawing Layers Properties

You can set these values directly in the program by clicking the Layout tab in the Project Browser. Double-click the LPF you want to edit under the Layer Setup node to display the Drawing Layer Options dialog box. Select the Drawing Layer 2d and Drawing Layer 3d nodes under the General folder. See “Options - Drawing Layer 2D Properties Dialog Box ” for details.

The following is an example for the drawing layer properties:

$DRAW_LAYERS_BEGIN                              
"Error" 255 255 0 16 1 1 0 35000 0 "" 0 0 1 "Obsolete" 0
"Air Bridge" 32896 65535 0 16 1 1 0 35000 0 "" 0 0 1 "Obsolete" 0
"Thick Metal" 8388 60884 0 16 1 1 0 35000 0 "" 0 0 1 "Obsolete" 0
"Via" 128 33023 0 16 1 1 0 35000 0 "" 0 0 1 "Obsolete" 0
"SubCircuitAnnotation" 4 48 0 16 1 1 0 350 0 "" 0 0 1 "Obsolete" 0
"Annotation" 128 33023 0 16 1 1 0 35000 0 "" 0 0 1 "Obsolete" 0
"RatsNest" 128 33023 0 16 1 1 0 35000 0 "" 0 0 1 "Obsolete" 0
$DRAW_LAYERS_END                              

Layer Mapping Properties

You can set these values directly in the program by clicking the Layout tab in the Project Browser. Double-click the LPF you want to edit under the Layer Setup node to display the Drawing Layer Options dialog box. Under the Model Layer Mappings folder select the mapping table you want to edit, or right-click the folder to add a new mapping table. See “Options - Model Layer Mappings Dialog Box ” for details.

An example for the model layer mapping follows. For each of the mapping pairs, the model layer is first and the drawing layer is second. The entries in the form "11_0" are used to map the GDSII model layers to drawing layers. In the following example, there are two mapping tables (Mapping 1 and Mapping 2). The $MAP_NAME keyword indicates the name of the map, which also indicates the beginning of a new table. This name cannot exceed 32 characters in length. The following two mapping tables are the same except the mapping of the Air Bridge and Thick Metal is reversed in the second table.

$MODEL_LAYER_BEGIN  
$MAP_NAME "Mapping 1"
"Error" "Error"
"Air Bridge" "Air Bridge"
"Thick Metal" "Thick Metal"
"Via" "Via"
"SubCircuitAnnotation" "SubCircuitAnnotation"
"Annotation" "Annotation"
"RatsNest" "RatsNest"
"11_0" "Air Bridge"
"12_0" "Error"
"13_0" "Via"
   
$MAP_NAME "Mapping 2"
"Error" "Error"
"Air Bridge" "Thick Metal"
"Thick Metal" "Air Bridge"
"Via" "Via"
"SubCircuitAnnotation" "SubCircuitAnnotation"
"Annotation" "Annotation"
"RatsNest" "RatsNest"
"11_0" "Air Bridge"
"12_0" "Error"
"13_0" "Via"
"Error" "Error"
"Air Bridge" "Air Bridge"
$MODEL_LAYER_END  

EM Layer Mapping Properties

You can set these values directly in the program by clicking the Layout tab in the Project Browser. Double-click the LPF you want to edit under the Layer Setup node to display the Drawing Layer Options dialog box. Under the EM Layer Mappings folder select the mapping table to edit, or right-click the folder to add a new mapping table. See “Options - EM Layer Mappings Dialog Box ” for details.

The following is an example of EMSight layer mapping. For each of the mapping entries, the drawing layer is first and the EMSight layer is second. The third entry indicates if the layer is a shape or a via, and the fourth entry is used to name a material. The $EM_MAP keyword indicates the name of the map and also the beginning of a new table.

$EM_MAPPING_BEGIN
    $EM_MAP "Default"
    !draw_layer 	em_layer is_via	 material
    "Thick Metal"  1       0     "" 
$EM_MAPPING_END

User Defined Drawing Layer Fill Patterns

The AWR Design Environment software includes many different predefined fill (or stipple or hatch) patterns you can use when setting up how the drawing layers display. You can also define your own custom fill patterns. A stipple pattern is defined as a string of '1' or '0 in 8x8, 16x16, and 32x32 forms. It must begin with the keyword $LAYER_FILL_PATTERN_BEGIN and end with $LAYER_FILL_PATTERN_END. Between the keywords, you can define one or many stipple patterns. Each stipple pattern consists of a display name followed by a series of '1's and '0's between '(' and ')' separated with white space(s). The display name is used in the internal data structures and does not need to be used elsewhere. The last two closing right parentheses of the fill pattern definition must be separated with a space: ‘) )'.

The following example shows some user defined patterns with the proper syntax for each block.

$LAYER_FILL_PATTERN_BEGIN
( display forward_slash (
    ( 0 1 0 1 0 1 0 1 )
    ( 1 0 1 0 1 0 1 0 )
    ( 0 1 0 1 0 1 0 1 )
    ( 1 0 1 0 1 0 1 0 )
    ( 0 1 0 1 0 1 0 1 )
    ( 1 0 1 0 1 0 1 0 )
    ( 0 1 0 1 0 1 0 1 )
    ( 1 0 1 0 1 0 1 0 )
) )
( display back_slash (
    ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
) )
( display big_plus (
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
    ( 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 )
) )
$LAYER_FILL_PATTERN_END 
                        
                    

After you define the stipple patterns and load the LPF into a project, when setting up drawing layers, see “Options - Drawing Layer 2D Properties Dialog Box ”. Your defined stipple pattern is included as an option for a layer.

4.4.3. The $EM_SETUP_BEGIN/END Section

There are several subsections that can be included in this section. The properties in this part of the LPF allow you to specify the default properties of the new EM structures and the properties of the conductor types available.

Default EM Enclosure Size

This subsection of EM Setup allows you to specify the x and y dimensions of a newly created EM structure. In addition, it allows the number of cells to be specified in the x and y dimensions. Note that x and y dimensions are specified in meters. The following example of this section sets the size of newly created EM structures to 800 x 800 um with 80 cells in the x and y dimensions.

$DEFAULT_EM_ENCLOSURE_BEGIN
!-----XDIM-----YDIM-----NX-----NY-----
      800e-6   800e-6   80     80
$DEFAULT_EM_ENCLOSURE_END

Default EM Layers

The following section is an obsolete way of configuring defaults for EM structures. The better approach is to add STACKUP blocks to your Global Definitions and configure your defaults on these blocks. When you create a new EM structure you can either initialize from the LPF or a STACKUP that is global. The STACKUP is better since you can have more than one default configured and the EM mapping (mainly used for extraction) is configurable.

This subsection of EM Setup allows you to define the stackup of dielectric layers for newly created EM structures. This includes the layer number, thickness, dielectric constant, conductivity, scale and hatch patterns to use for conductors placed on that layer. Note that thickness should be specified in meters, and the conductivity in S/m. The hatch pattern is specified by a number between zero and five. The following is an example of this section:

$DEFAULT_EM_LAYERS_BEGIN
!----T----Er--Tand---Sigma---Scale---CondHatch---ViaHatch---
  500e-6  1.0  0.0    0.0     1.0        0        1
  0.2e-6  6.5  0.005  0.0     5.0        4        5
  100e-6  12.9 0.0001 0.0     1.0        2        3
$DEFAULT_EM_LAYERS_END

EM Conductors

The following section is an obsolete way of configuring defaults for EM structures. The better approach is to add STACKUP blocks to your Global Definitions and configure your defaults on these blocks. When you create a new EM structure you can either initialize from the LPF or a STACKUP that is global. The STACKUP is better since you can have more than one default configured and the EM mapping (mainly used for extraction) is configurable.

This section of EM Setup allows you to automatically specify the materials available for use as conductors. You can specify the materials using physical parameters or electrical parameters. An electrical specification includes the conductor name, surface resistance and DC, high frequency surface resistance parameter, and the excess surface reactance. All of these quantities are specified in ohms per square. A physical specification of a conductor includes the name, thickness in meters and the conductivity in S/m. In addition, the color of each conductor is specified using a red/green/blue notation. Each of these integer parameters should be in the 0 to 255 range and the names cannot exceed 32 characters in length. The following is an example of this section:

$EM_CONDUCTORS_BEGIN
   $ELECTRICAL_SPEC_BEGIN
   !--Name--------rDC---rHF--+jX---Red---Green---Blue
     "Tantalum"   50.0  0.0  0.0   230     20    50
   $ELECTRICAL_SPEC_END
   $PHYSICAL_SPEC_BEGIN
   !--Name---------T------Sigma----Red----Green---Blue--
     "Cap Bottom"   1e-6  4.1e7    128     128    64
     "Plated Metal" 4e-6  4.1e7    230     155    40
     "Thick Metal"  3e-6  4.1e7     45     160   120
   $PHYSICAL_SPEC_END
$EM_CONDUCTORS_END  

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