TCMLIN_EM is a model of a segment of microstrip line with an optional trapezoidal cross-section and optional dielectric coating representing a solder mask overlay. You can select the shape of cross-section, setting the sign and value of the cross-sectional undercut. You can use this model to explore the impact of etching/plating tolerances on the electrical performance of PCB/IC, simultaneously accounting for the effect of the solder mask. Multiple instances of TCMLIN_EM can be used to create a set of coated coupled microstrip lines.
This element is for use in 3D EM documents only. It is intended to create a 3D parameterized cell for a coated microstrip line with trapezoidal cross-section and solder mask overlay for 3D EM analysis. See “Using 3D EM Elements ” for details on using 3D pCells with Cadence® AWR® Analyst™ 3D FEM EM analysis software.
|W||Width of conductor (top side)||Length||100 um|
|L||Length of conductor||Length||1000 um|
|T||Conductor thickness||Length||10 um|
|Und||Etching undercut||Length||15 um|
|Rho||Bulk resistance of conductor metal normalized to gold||1.0|
|TS||Solder mask thickness||Length||10 um|
|SS1||Solder mask left shoulder||Length||50 um|
|SS2||Solder mask right shoulder||Length||50 um|
|ErS||Relative dielectric constant of solder mask||3|
|TandS||Loss tangent of solder mask||1e-3|
|IsSolderMask||Switch "No solder mask/Solder mask overlay"||No solder mask|
|*DIE_NAME||Filling dielectric name for 3D EM cell||""|
* indicates a secondary parameter
W. Specifies the top side of a cross-sectional trapezoid (see the "Topology" section).
Und. Specifies how the bottom side of a cross-sectional trapezoid differs from the top side. If Und>0 (see the "Topology" section), then the bottom side equals W + 2*Und; if Und<0, then the bottom side equal W - 2*|Und| where |Und| is an absolute value.
SS1, SS2. Shoulders of solder mask overlay SS1 and SS2 are measured from the downward projection of the trapezoid top side onto the bottom side (see the "Topology" section).
Minimal allowable value of W, T, and TS is equal to 0.1 micron.
TCMLIN_EM sets the lower cap on SS1 and SS2 equal to Und if Und >0
You can use the DIE_NAME (secondary) parameter to assign different dielectric materials to multiple instances of TCMLIN_EM.
The layout for this cell has hard-coded model layers. When you first use this layout cell, a layer named "TCMLIN_EM" is added to your drawing layer and model layer list (if they are not already there). Using the model layer mapping, you can assign these layers to draw on any drawing layer.
This element has a layout cell specifically for Analyst 3D EM layouts. See “Using 3D EM Elements ” for details on using 3D pCells with Analyst software.