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2-Port Negation Based on Short-Open Calibration for De-embedding (Closed Form): SOC_DEMB

Symbol

Summary

SOC_DEMB allows you to manually de-embed parasitics from an EM simulation by simulating the structure with no de-embedding for the ports of interest. After this step, a second structure is created as a standard to de-embed port parasitics. You can then use a schematic with the SOC_DEMB element to properly remove the parasitics.

Parameters

Name Description Unit Type Default
ID Name Text N1
NET Symmetric 3-port network used for negation Text "name"

Layout

This element does not have an assigned layout cell. You can assign artwork cells to any element. See “Assigning Artwork Cells to Layout of Schematic Elements” for details.

Implementation Details

See the AWR Knowledge Base for examples on how to use these models for specific configurations of ports when using the Cadence® AWR® AXIEM® 3D planar EM analysis simulator.

When using the SOC_DEMB element, note the following limitations:

  • When building the de-embedding schematic, you should connect port1 of the SOC_DEMB (the side with the "/" next to the node) to the port in the schematic, NOT to the subcircuit containing the embedded structure. The following figure shows the proper configuration.

  • When generating your standard for EM structures, the internal port should be the middle of the structure, and the positive side of the internal port should be on the same side as port 2 of the structure. The following figure shows the proper port configuration.

  • The overall length of the structure should be 4x (2x on either side of the internal port) the line width or the substrate height, whichever is greater.

  • For any ports de-embedded this way, make sure de-embedding is turned off for all ports in the de-embedding standard and those ports in the simulated structure.

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