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The Cadence® R3_CMC element is a three-terminal nonlinear (diffused and polysilicon) resistor model and JFET Model. R3_CMC is Verilog-A based and implements version 1.0.
See the Compact Model Alliance website[1] for complete documentation and Verilog-A definition of this model.
Only primary parameters are shown. Secondary parameters follow the R3_CMC model specification/standard.
| Name | Description | Binnable | Unit Type | Default |
|---|---|---|---|---|
| ID | Element ID | Text | X1 | |
| m | multiplicity factor | Scalar | 1 | |
| w | design width of resistor body | Length | 1 | |
| l | design length of resistor body | Length | 1 | |
| trise | local temperature delta to ambient (before self-heating) | Scalar | 0 | |
| tnom | nominal (reference) temperature | 27 |
Operating point information is identical to that found in the Verilog-A definition of the model.
The type parameter controls whether the substrate is p or n type. The extraction and simulation temperatures are controlled using the tnom and trise parameters, respectively. Parameter default and truncation values are identical to those found in the Verilog-A definition of the model.
This element does not have an assigned layout cell. You can assign artwork cells to any element. See “Assigning Artwork Cells to Layout of Schematic Elements” for details.