WIRE1C allows to model either round bond wire or flat ribbon that connects two conducting pads or microstrip lines. The model takes into account substrate proximity and the wire's arc shape. WIRE1C also differs from WIRE1 in that it uses substrate with optional cover MSUBC instead of MSUB. MSUBC allows to place/remove PEC cover above the bond wire/ribbon .
|L||Wire length (distance between pads)||Length||L|
|HW||Wire /ribbon midpoint elevation over the substrate||Length||W|
|Rho||Metal resistivity relative to gold||1|
|WIRE_OR_RIBBON||Switch Wire/Ribbon specification mode||Text||"Round wire"|
|DIA||Diameter of round bond wire (only if value of parameter WIRE_OR_RIBBON is "Round wire")||Text||40 μm|
|WR||Width of flat ribbon (only if value of parameter WIRE_OR_RIBBON is "Flat ribbon")||Text||200 μm|
|TR||Width of flat ribbon (only if value of parameter WIRE_OR_RIBBON is "Flat ribbon")||Text||50 μm|
H. The wire has an arc shape and H is the height of its summit point.
L. L is the shortest straight distance between points where wire is affixed to the pads.
MSUBC cover related parameters: Cover, HC, ErC, TandC, SW. Parameter Cover gives user an opportunity to chose between options "No cover" (default),""Metallic cover', and "Metallic box". Option "No cover" makes WIRE1C to behave like WIRE1; Option "Metallic cover" places PEC grounded infinite plane at the elevation HC above the substrate; Option "Metallic box" confines the wire /ribbon into the enclosure with PEC walls. The top PEC wall is at the height HC above the substrate, the bottom wall is represented by the grounded side of a substrate, and the side walls are at a distance SW from each side of wire. Material parameters ErC and TandC are permittivity and loss tangent of dielectric filling under the cover.
Minimal allowed HC (elevation of metallic cover above substrate) is limited by HW (wire midpoint elevation over the substrate) and Dia (for round wire) or TR (for flat ribbon) (See Topology). The following limitations are imposed by common sense (cover should not touch wire) and by the specifics of EM quasi-static technique used for modeling:
If WIRE_OR_RIBBON = "Round wire":
HC > HW + 0.83*Dia
If WIRE_OR_RIBBON = "Flat ribbon":
HC > HW + 1.053*TR
This model is based on a quasi-static electromagnetic analysis described in . It accounts for losses in metal and in substrate dielectric. Dispersion is partly included.
To decrease the calculation time for schematics that contain several of these elements, the electromagnetic analyses are cached; (saved and reused in later analyses). Thus, the first analysis of a circuit containing multiple bond wires takes longer than subsequent analyses.
NOTE: The quasi-static electromagnetic models use lengthy numerical algorithms which may lead to a noticeable increase in simulation time for schematics that employ many such models.
If wire elevation is very small in comparison with the substrate thickness, simulation time may also increase noticeably.
This element uses a special layout cell for a short circuit. The layout cell allows the elements connected on either side of the element to look through this element. For example, when a MLIN is hooked to a TFCM (capacitor) model and the project has bridge code configured, the line draws the proper interconnect between the line and the cap. If this element is placed between the line and the cap, the layout still draws the same.
You typically do not assign artwork cells to these items.
For a wide range of substrate and wire parameters, the closed-form model WIRE2 may provide accuracy approaching that of WIRE1C (at switch WIRE_OR_RIBBON = "Round wire" and substrate MSUBC parameter Cover="No cover") . However, the analysis of WIRE2 is based on an assumption that H is large relative to the substrate thickness, so WIRE2 issues a warning if the wire is placed too close to the substrate. WIRE1C may be useful for validation of designs using WIRE2.
Parameters of substrate MSUBC: Cover, HC, ErC, and TandC control positioning of metallic cover and material parameters of dielectric material surrounding the wire (see Topology and details in MSUBC documentation).