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Lump Coupling between Vias in Multilayer Board: VIAMC



VIAMC represents a lump coupling between two similar vias in a multilayer printed circuit board. Coupling is evaluated as electromagnetic interference between sections of two vias confined within a user-selected dielectric layer from the board stackup. You can select any layer sandwiched between two ground planes because coupling evaluation is based on interaction of the single TMo mode propagating along a parallel-plate waveguide made by two adjacent ground planes. VIAMC can be used only in conjunction with the VIAM2 element and it must attach to dedicated coupling ports of VIAM2. See VIAM2 for additional details.


See VIAM2.


Name Description Unit Type Default
ID Element ID Text V1
DV External diameter of via hole Length W[1]
DA Diameter of antipad Length L[1]
H Height of dielectric layer Length 0.1 mm
Er Relative dielectric constant of dielectric layer   1
*Acc Switch "Default/High"   "Default"

[1] User-modifiable default. Modify by editing under $DEFAULT_VALUES in the default.lpf file in the root installation directory. See “Default Values” for details.

* indicates a secondary parameter

Parameter Details

H, Er. These parameters define the height and dielectric constant of the dielectric layer selected from the board stackup.

Acc. The default value of this parameter excludes the contribution of higher modes into the via model. Setting Acc=High adds the evaluation of series representing the contribution of higher modes and slightly increases simulation time. In most cases, Acc=Default provides sufficient accuracy but for very long vias crossing many dielectric layers Acc=High might be beneficial. Note that the value of Acc should match the value of Acc set for attached VIAM2 elements.

Parameter Restrictions and Recommendations

  1. This model assumes that only dominant mode TMo propagates in the selected layer over all frequency sweep. The height and dielectric constant of the layer are checked for cutoff frequency of the higher mode propagating in the respective parallel-plate waveguide. Usually, this cutoff frequency has an order of hundred(s) gigahertz. Specifics of VIAMC implementation demand the cutoff frequency to be over 10 GHz. If for any reason (most possibly user error) cutoff frequency is below 10 GHz, VIAMC issues an error message and stops simulation.

Implementation Details

Implementation of this element constitutes a lumped approximation of electromagnetic coupling between two identical vias comprised of via segments confined to a single dielectric layer. This coupling is evaluated in absence of other vias (similar to the VIAMD element).


This element does not have an assigned layout cell. You can assign artwork cells to any element. See “Assigning Artwork Cells to Layout of Schematic Elements” for details.

Recommendations for Use

  1. VIAMC must connect only to side (coupling) ports of VIAM2 elements.

  2. To provide accurate evaluation of coupling all elements, VIAM2 elements connected with VIAMC elements must have identical DV, DA, and Acc parameters and values.

  3. Building a network of coupled vias requires one VIAMC element per layer, per each pair of VIAM2 elements included in a coupled set of vias. For efficiency, a good practice may be to create separate subcircuits for each layer and connect VIAM2 elements to subcircuits using named connectors (NCONN) and named ports (PORT_NAME). For more information, see the example in VIAM2.

  4. This model uses a disk cache, so if a project contains multiple instances of identical VIAMC only one instance simulates and saves results to the cache, and all identical (having the same parameter set) VIAMC elements simply fetch these results from the cache. Note that the cache keeps saved data, and any project on the same computer that contains VIAMC with the same set of parameters reuses the cached data.


[1] Qizheng Gu, Y. Eric Yang, and M. Ali Tassoudji, "Modeling and Analysis of Vias in Multilayered Integrated Circuits," IEEE Trans. on Microwave Theory and Tech., vol. 41, February 1993, pp. 206-214

[2] Qizheng Gu, M.Ali Tassoudji et. al., "Coupled Noise Analysis for Adjacent Vias in Multilayered Digital Circuits," IEEE Trans. on Circ. and Syst., vol. 41, December 1994, pp. 796-804

[3] B. Tomasic and A. Hessel, "Linear Array of Coaxially Fed Monopole Elements in a Parallel Plate Waveguide," IEEE Trans. on Antennas and Prop., vol. 36, April 1988, pp. 449-462

[5] FEMM (by David Meeker) home page: https://www.femm.info/wiki/HomePage

[6] Jonathan Richard Shewchuk. Triangle. A Two-Dimensional Quality Mesh Generator and Delaunay Triangulator. Follow this link for information and download: http://cs.cmu.edu/~quake/triangle.html

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