|*CJ0||Zero-voltage junction capacitance||Capacitance||1 pF|
|*VJ||Built-In voltage||Voltage||1 V|
|*VDD||Junction DC bias voltage||Voltage||0 V|
|AFAC||Junction area scaling factor||1|
* indicates a secondary parameter
VCJCN is a nonlinear PN junction depletion capacitance described by a Taylor series expansion in the vicinity of its DC bias voltage, VDD. Its charge-voltage characteristic is give by
where qn are the coefficients of a Taylor-series expansion of the junction charge function
The current in the capacitor is simply
where i is the current in the controlled source and v is the control voltage. Since the qn are evaluated at a particular DC bias voltage, DC bias is implicit in the model. Thus, DC bias must not be included in the circuit.
This element does not have an assigned layout cell. You can assign artwork cells to any element. See “Assigning Artwork Cells to Layout of Schematic Elements” for details.