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Microstrip Interdigital Capacitor with Optional Cover (Aggregate): MICAPC



MICAPC models a microstrip interdigital capacitor that has an emphasized transverse metallic strip connecting fingers at both input ports. MICAPC differs from MICAP in that it uses substrate with optional cover MSUBC instead of MSUB. MSUBC allows to place/remove PEC cover or box above the microstrip lines. MICAPC takes advantage of the EM Quasi-Static coupled lines approach to considering interaction between all fingers.

MICAPC$ is the corresponding intelligent cell (iCell). An iCell model is identical to its non-iCell equivalent with the following exception: Certain dimension-related parameters are not explicitly user-specified; rather, they are automatically and dynamically determined by the dimensions of the attached elements. See “Intelligent Cells (iCells)” for a detailed discussion of how to use iCells, their advantages, and their limitations.



Name Description Unit Type Default
ID Element ID Text MI1
W Finger width Length W[1]
S Spacing between adjacent fingers Length S[1]
G End gap width Length S[1]
L Length of the overlap region of the fingers Length L[1]
N Number of fingers   4
WP Width of the fingers transverse interconnect Length W[1]
W1 Width of the feeding line at port 1 Length W[1]
W2 Width of the feeding line at port 2 Length W[1]
MSUBC Substrate definition Text MSUB1C[1]

[1] User-modifiable default. Modify by editing under $DEFAULT_VALUES in the default.lpf file in the root installation directory. See the AWR Microwave Office Layout Guide for details.

Parameter Details

W1. This parameter is secondary for the MICAPC$ iCell model.

W2. This parameter is secondary for the MICAPC$ iCell model.

MSUBC cover related parameters: Cover, HC, ErC, TandC, SW. Parameter Cover gives user an opportunity to chose between options "No cover" (default),""Metallic cover', and "Metallic box". Option "No cover" makes MICAPC to behave like MICAP; Option "Metallic cover" places PEC grounded infinite plane at the elevation HC above the substrate; Option "Metallic box" confines capacitor into the enclosure with PEC cover as top and side PEC walls parallel to fingers. The top PEC is at the height HC above the substrate, the bottom wall is represented by the grounded side of a substrate, and the side walls are at a distance SW from extreme left/right conductors. Material parameters ErC and TandC are permittivity and loss tangent of dielectric filling under the cover.

Parameter Restrictions and Recommendations

  1. The number of fingers N must be 4 ≤N≤ 16. You should use the MICAPC model instead for all capacitors with N=2 and N=3.

  2. Conductor thickness is set via substrate parameters. MICAPC does not impose restrictions on thickness except for the requirement to be non-negative.

  3. Being an aggregate model, MICAPC comprises multiple component elements including several Microstrip Tee - Junctions (MTEE). Correct usage of MTEE imposes certain limitations on ratios of widths of conductors (W) to height of a substrate (H). MTEE provides the highest accuracy if ratio W/H of all MICAPC conductors (W, W1, W2, and WP) is greater than 0.2.

Implementation Details

The EM Quasi-Static technique allows you to model a microstrip interdigital capacitor with a wide range of conductor thicknesses.

MICAPC accounts for the effect of phase shift along the microstrip line that connects fingers. It also includes the effect of the presence of width steps at ports.

To apply Method of Moments for analysis, a quasi-static model creates 1D mesh covering contours of all conductors. The mesh is made of linear segments (pulses) of varying lengths. The length of a pulse is relatively big at the conductor center; it decreases toward the conductor edges to reveal the charge distribution across the conductor. If the conductor width is prohibitively large it may cause the pulse size to approach zero for pulses close to the edge. In these rare cases the model may display a “Length of pulse #nnn equal to zero” error message.


This element uses line types to determine its layout. By default, the layout uses the first line type defined in your Layout Process File (LPF). You can change the element to use any of the line types configured in your process:

  1. Select the item in the layout.

  2. Right-click and choose Shape Properties to display the Cell Options dialog box.

  3. Click the Layout tab and select a Line Type.

  4. Click OK to use the new line type in the layout.

See “Cell Options Dialog Box: Layout Tab ” for Cell Options dialog box Layout tab details.

See “The Layout Process File (LPF)” for more information on editing Layout Process Files (LPFs) and to learn about adding or editing line types.

Recommendations for Use

This model should be used for microstrip interdigital capacitors that have a prominent metallic strip of width WP connecting fingers at both ports. If this is not so, and one or both widths of feeding lines exceed 50% of capacitor width, you should use the MICAP1C model. MICAP1C is geared toward interdigital capacitors that are incorporated into microstrip line having a width equal to that of the capacitor.

MICAPC accounts for losses in metal and in substrate dielectric. Dispersion is partly included.

To decrease the calculation time for schematics that contain several microstrip interdigital capacitors, cache is implemented for this model. This means that during the first evaluation of a schematic the most time-consuming intermediate parameters for each capacitor instance are stored in memory cache. Each interdigital capacitor model checks this cache looking for its duplicate. Duplicate capacitors copy the appropriate parameters from the memory cache, saving substantially on their recalculation.

NOTE: The implementation of EM Quasi-Static models relies heavily on the involved numerical algorithms. This may lead to a noticeable increase in simulation time for schematics that employ many such models.


[1] B. Bazdar, A.R. Djordjevic, R.F. Harrington, and T.K. Sarkar, "Evaluation of quasi-static matrix parameters for multiconductor transmission lines using Galerkin's method," IEEE Trans. Microwave Theory Tech., vol. MTT-42, July 1994, pp. 1223-1228.

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