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Hiroshima University STARC IGFET Model: HISIM



The Cadence® AWR® HISIM element implements Hiroshima University's STARC IGFET Model. HISIM is Verilog-A based and implements version 251.

HISIM is the first complete surface-potential-based MOSFET model for circuit simulation based on the drift-diffusion approximation. This modeling approach relies on a unified description of device characteristics for all bias conditions. All new phenomena such as short-channel and reverse-short-channel effects are included in the surface potential calculations, causing modifications resulting from the features of these advanced technologies.

See the model website[1] for complete documentation and Verilog-A definition of component models.


Only primary parameters are shown. Secondary parameters follow the model specification/standard.

Name Description Binnable Unit Type Default
ID Device ID   Text M1
TYPE Device Type     NMOS
TNOM Parameter extraction temperature   Temperature 27
TEMP Ambient temperature   Temperature _TEMP
MULT Number of devices in parallel     1

Operating Points

You can access operating point information, as defined by the active Verilog-A based component model.

Implementation Details

The TYPE parameter controls whether the device is NMOS or PMOS; its setting is reflected by the device symbol. The extraction and simulation temperatures are controlled using the TNOM and TEMP parameters, respectively. The MULT parameter determines the number of devices in parallel. The remaining parameter default and truncation values are identical to those found in the Verilog-A definition of the model.


This element does not have an assigned layout cell. You can assign artwork cells to any element. See “Assigning Artwork Cells to Layout of Schematic Elements” for details.


[1] http://home.hiroshima-u.ac.jp/usdl/HiSIM2/

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