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Advanced Curtice Quadratic FET Model with Noise: CURTICE2ADV

Symbol

Summary

CURTICE2ADV implements the Curtice-Quadratic GaAsFET model [1] with all of the extensions found in ADS's Advanced Curtice2 Model. Contact Technical Support for AWR Products for additional information.

Parameters

Name Description Unit Type Default
ID Device ID Text CF1
*IDSMOD Ids Model (not used) Scaler 1
*VTO Pinch-off voltage Voltage -2.0
*BETA Transconductance Scaler 1.0E-4
*LAMBDA Channel length modulation Scaler 0.0
*ALPHA I/V knee parameter Scaler 2.0
*TAU Transit time Time 0
*TAUMDL (Not implemented) Time 0
*TNOM Temperature at which model parameters were determined Temperature 25
*IDSTC Ids Temperature coefficient Scaler 0
*UCRIT Transconductance degradation coefficient Scaler 0
*VGEXP Vg-VTO exponent Scaler 2.0
*GAMDS Pinch-off coefficient for Vds Scaler -0.01
*VTOTC VTO temperature coefficient Scaler 0
*BETATCE Beta exponent temperature coefficient Scaler 0
*RGS Gate to source resistance Resistance 1E-3
*RF Gate to source forward bias resistance Resistance 1E6
*GSCAP 0=none, 1=linear, 2=pn junction Scaler 1
*CGS Gate-source zero-bias capacitance Capacitance 0
*CGD Gate-drain zero-bias capacitance Capacitance 0
*GDCAP 0=none, 1=linear, 2=pn junction Scaler 1
*FC Depletion capacitance linearization parameter Scaler 0.5
*RGD Gate to drain resistance Resistance 1E-3
*RD Drain resistance Resistance 1E-3
*RG Gate resistance Resistance 1E-3
*RS Source resistance Resistance 1E-3
*LD Drain inductance Inductance 0
*LG Gate inductance Inductance 0
*LS Source inductance Inductance 0
*CDS Drain to source capacitance Capacitance 0
*RC RF drain to source resistance Resistance 1.0E6
*CRF Capacitance that sets the RF Rds break freq Capacitance 0
*GSFWD 0=none, 1=linear, 2=diode Voltage 1
*GSREV 0=none, 1=linear, 2=diode Voltage 0
*GDFWD 0=none, 1=linear, 2=diode Voltage 0
*GDREV 0=none, 1=linear, 2=diode Voltage 1
*R1 Breakdown resistance Resistance 1E6
*R2 Breakdown voltage to channed current resistance Resistance 1E-3
*VBI Gate to source built-in voltage Voltage 0.85
*VBR Breakdown voltage Voltage 1.0E6
*VJR Breakdown potential Voltage 1.0
*IS Diode reverse saturation current Current 1.0E-14
*IR Gate reverse saturation current Current 1.0E-14
*IMAX (Not implemented) Current 0.0
*XTI Temperature term for saturation current Scaler 3.0
*EG Energy gap for temperature scaling of IS Scaler 1.11
*N Diode ideality factor Scaler 1.0
*FNC 1/F noise corner Frequency 0.0
*R Gate noise param Scaler 0.5
*P Drain noise param Scaler 1.0
*C Noise correlation Scaler 0.9
*TEMP Device Temperature Temperature 25
AFAC Gate width scale factor Scaler 1.0
NFING Number of gate fingers scale factor Scaler 1.0
*NFLAG Noise Model Scaler Noise Off

* indicates a secondary parameter

Implementation Details

This model is based on ADS's publicly available model documentation, and as such, it has a parameter set and behavior consistent with ADS's original model. Most parameters are consistent with ADS's implementation of the model. There are some parameters, however, that are unique to the AWR implementation of the model: The NFLAG parameter allows enabling/disabling the noise sources of the model. The AFAC and NFING parameters are used to specify the device geometry and correspond to the area and number of fingers, respectively.

Layout

This element does not have an assigned layout cell. You can assign artwork cells to any element. See “Assigning Artwork Cells to Layout of Schematic Elements” for details.

References

[1] W. R. Curtice, A MESFET model for use in the design of GaAs integrated circuits, IEEE Trans Microwave Theory Tech , vol. MTT-28, pp. 448-456, May 1980.

[2] P. Antognetti and G. Massobrio, Semiconductor Device Modeling with SPICE, New York: McGraw-Hill, 1988.

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